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AFS090-1FGG256I 参数 Datasheet PDF下载

AFS090-1FGG256I图片预览
型号: AFS090-1FGG256I
PDF下载: 下载PDF文件 查看货源
内容描述: Actel的Fusion混合信号FPGA [Actel Fusion Mixed-Signal FPGAs]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 318 页 / 10484 K
品牌: ACTEL [ Actel Corporation ]
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Device Architecture  
DINA and DINB  
These are the input data signals, and they are nine bits wide. Not all nine bits are valid in all  
configurations. When a data width less than nine is specified, unused high-order signals must be  
grounded (Table 2-29).  
DOUTA and DOUTB  
These are the nine-bit output data signals. Not all nine bits are valid in all configurations. As with  
DINA and DINB, high-order bits may not be used (Table 2-29). The output data on unused pins is  
undefined.  
Table 2-29 • Unused/Used Input and Output Data Pins for Various Supported Bus Widths  
DINx/DOUTx  
D×W  
4k×1  
2k×2  
1k×4  
512×9  
Unused  
[8:1]  
Used  
[0]  
[8:2]  
[1:0]  
[3:0]  
[8:0]  
[8:4]  
None  
Note: The "x" in DINx and DOUTx implies A or B.  
2-62  
Preliminary v1.7  
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