欢迎访问ic37.com |
会员登录 免费注册
发布采购

A3P250-1FGG144I 参数 Datasheet PDF下载

A3P250-1FGG144I图片预览
型号: A3P250-1FGG144I
PDF下载: 下载PDF文件 查看货源
内容描述: 闪光的ProASIC3系列FPGA [ProASIC3 Flash Family FPGAs]
分类和应用: 现场可编程门阵列可编程逻辑
文件页数/大小: 206 页 / 5922 K
品牌: ACTEL [ Actel Corporation ]
 浏览型号A3P250-1FGG144I的Datasheet PDF文件第7页浏览型号A3P250-1FGG144I的Datasheet PDF文件第8页浏览型号A3P250-1FGG144I的Datasheet PDF文件第9页浏览型号A3P250-1FGG144I的Datasheet PDF文件第10页浏览型号A3P250-1FGG144I的Datasheet PDF文件第12页浏览型号A3P250-1FGG144I的Datasheet PDF文件第13页浏览型号A3P250-1FGG144I的Datasheet PDF文件第14页浏览型号A3P250-1FGG144I的Datasheet PDF文件第15页  
ProASIC3 Device Family Overview  
I/Os with Advanced I/O Standards  
The ProASIC3 family of FPGAs features a flexible I/O structure, supporting a range of voltages  
(1.5 V, 1.8 V, 2.5 V, and 3.3 V). ProASIC3 FPGAs support many different I/O standards—single-ended  
and differential.  
The I/Os are organized into banks, with two or four banks per device. The configuration of these  
banks determines the I/O standards supported.  
Each I/O module contains several input, output, and enable registers. These registers allow the  
implementation of the following:  
Single-Data-Rate applications  
Double-Data-Rate applications—DDR LVDS, B-LVDS, and M-LVDS I/Os for point-to-point  
communications  
ProASIC3 banks for the A3P250 device and above support LVPECL, LVDS, B-LVDS and M-LVDS.  
B-LVDS and M-LVDS can support up to 20 loads.  
Part Number and Revision Date  
Part Number 51700097-001-1  
Revised February 2008  
List of Changes  
The following table lists critical changes that were made in the current version of the document.  
Previous Version  
Changes in Current Version (v1.0)  
Page  
51700097-001-1  
This document was divided into two sections and given a version number,  
starting at v1.0. The first section of the document includes features, benefits,  
ordering information, and temperature and speed grade offerings. The second  
section is a device family overview.  
51700097-001-0  
(January 2008)  
This document was updated to include A3P015 device information. QN68 is a  
new package that was added because it is offered in the A3P015. The following  
sections were updated:  
N/A  
"Features and Benefits"  
"ProASIC3 Ordering Information"  
"Temperature Grade Offerings"  
"ProASIC3 Product Family"  
"A3P015 and A3P030" note  
"Introduction and Overview"  
The "ProASIC3 FPGAs Package Sizes Dimensions" table is new.  
II  
In the "ProASIC3 Ordering Information", the QN package measurements were  
updated to include both 0.4 mm and 0.5 mm.  
III  
In the "General Description" section, the number of I/Os was updated from 288  
to 300.  
1-1  
v2.2  
(July 2007)  
This document was previously in datasheet v2.2. As a result of moving to the  
handbook format, Actel has restarted the version numbers. The new version  
number is 51700097-001-0.  
N/A  
v1.0  
1-7  
 复制成功!