Integrator Series FPGAs: 1200XL and 3200DX Families
Parameter Measurement
Output Buffer Delays
E
D
PAD To AC test loads (shown below)
TRIBUFF
In
50%
VOH
E
50%
E
50%
50%
VCC
50%
VOH
50%
1.5V
1.5V
VOL
90%
PAD
VOL
PAD
PAD
GND
1.5V
10%
1.5V
tDLH
tDHL
tENZL
tENLZ
tENZH
tENHZ
AC Test Loads
Load 1
Load 2
(Used to measure propagation delay)
(Used to measure rising/falling edges)
VCC
GND
To the output under test
35 pF
R to VCC for tPLZ/tPZL
R to GND for tPHZ/tPZH
R = 1 k¾
To the output under test
35 pF
Input Buffer Delays
Module Delays
S
A
B
Y
Y
PAD
INBUF
S, A or B
Y
50% 50%
3V
50%
50%
PAD
0V
50%
1.5V
VCC
1.5V
tPLH
tPHL
Y
Y
GND
50%
50%
tPHL
50%
tPLH
tINYH
tINYL
20
Discontinued – v3.0