欢迎访问ic37.com |
会员登录 免费注册
发布采购

A1240A-1PL176C 参数 Datasheet PDF下载

A1240A-1PL176C图片预览
型号: A1240A-1PL176C
PDF下载: 下载PDF文件 查看货源
内容描述: ACT2系列FPGA [ACT2 Family FPGAs]
分类和应用:
文件页数/大小: 38 页 / 610 K
品牌: ACTEL [ Actel Corporation ]
 浏览型号A1240A-1PL176C的Datasheet PDF文件第17页浏览型号A1240A-1PL176C的Datasheet PDF文件第18页浏览型号A1240A-1PL176C的Datasheet PDF文件第19页浏览型号A1240A-1PL176C的Datasheet PDF文件第20页浏览型号A1240A-1PL176C的Datasheet PDF文件第22页浏览型号A1240A-1PL176C的Datasheet PDF文件第23页浏览型号A1240A-1PL176C的Datasheet PDF文件第24页浏览型号A1240A-1PL176C的Datasheet PDF文件第25页  
ACT2 Family FPGAs  
Pin Description  
CLKA  
Clock A (Input)  
PRA  
Probe A (Output)  
TTL Clock input for clock distribution networks. The Clock  
input is buffered prior to clocking the logic modules. This  
pin can also be used as an I/O.  
The Probe A pin is used to output data from any  
user-defined design node within the device. This  
independent diagnostic pin is used in conjunction with the  
Probe B pin to allow real-time diagnostic output of any  
signal path within the device. The Probe A pin can be used  
as a user-defined I/O when debugging has been completed.  
The pins probe capabilities can be permanently disabled to  
protect programmed design confidentiality. PRA is active  
when the MODE pin is HIGH. This pin functions as an I/O  
when the MODE pin is LOW.  
CLKB  
Clock B (Input)  
TTL Clock input for clock distribution networks. The Clock  
input is buffered prior to clocking the logic modules. This  
pin can also be used as an I/O.  
DCLK  
Diagnostic Clock (Input)  
TTL Clock input for diagnostic probe and device  
programming. DCLK is active when the MODE pin is HIGH.  
This pin functions as an I/O when the MODE pin is LOW.  
PRB  
Probe B (Output)  
The Probe B pin is used to output data from any  
user-defined design node within the device. This  
independent diagnostic pin is used in conjunction with the  
Probe A pin to allow real-time diagnostic output of any  
signal path within the device. The Probe B pin can be used  
as a user-defined I/O when debugging has been completed.  
The pins probe capabilities can be permanently disabled to  
protect programmed design confidentiality. PRB is active  
when the MODE pin is HIGH. This pin functions as an I/O  
when the MODE pin is LOW.  
GND  
Ground  
LOW supply voltage.  
I/O  
Input/Output (Input, Output)  
The I/O pin functions as an input, output, three-state, or  
bidirectional buffer. Input and output levels are compatible  
with standard TTL and CMOS specifications. Unused I/O  
pins are automatically driven LOW by the ALS software.  
MODE  
Mode (Input)  
The MODE pin controls the use of multifunction pins  
(DCLK, PRA, PRB, SDI). When the MODE pin is HIGH, the  
special functions are active. When the MODE pin is LOW,  
the pins function as I/Os. To provide Actionprobe capability,  
the MODE pin should be terminated to GND through a 10K  
resistor so that the MODE pin can be pulled high when  
required.  
SDI  
Serial Data Input (Input)  
Serial data input for diagnostic probe and device  
programming. SDI is active when the MODE pin is HIGH.  
This pin functions as an I/O when the MODE pin is LOW.  
VCC  
5.0V Supply Voltage  
HIGH supply voltage.  
NC  
No Connection  
This pin is not connected to circuitry within the device.  
v4.0  
21  
 复制成功!