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A1225XL-PLB 参数 Datasheet PDF下载

A1225XL-PLB图片预览
型号: A1225XL-PLB
PDF下载: 下载PDF文件 查看货源
内容描述: 集成系列FPGA : 1200XL和3200DX家庭 [Integrator Series FPGAs: 1200XL and 3200DX Families]
分类和应用:
文件页数/大小: 84 页 / 3116 K
品牌: ACTEL [ Actel Corporation ]
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Integrator Series FPGAs: 1200XL and 3200DX Families  
3200DX Timing Model (Logic Functions using Quadrant Clocks)*  
Input Delays  
Internal Delays  
Predicted  
Routing  
Delays  
Output Delays  
I/O Module  
I/O Module  
INPY = 1.4 ns  
t
tIRD1 = 1.9 ns  
Combinatorial  
Module  
t
DLH = 3.7 ns  
tRD1 = 1.1 ns  
tRD2 = 1.7 ns  
tRD4 = 2.6 ns  
D
Q
tPD = 2.0 ns  
G
Decode  
Module  
tINH = 0.0 ns  
tINSU = 0.45 ns  
tINGO = 3.3 ns  
t
RDD = 0.3 ns  
I/O Module  
tPDD = 2.5 ns  
tDLH = 3.7 ns  
Sequential  
Logic Module  
t
RD1 = 1.1 ns  
Combin-  
D
D
G
Q
Q
atorial  
Logic  
included  
in tSUD  
tENHZ = 8.3 ns  
tLH = 0.0 ns  
tLSU = 0.26 ns  
tCO = 2.3 ns  
tSUD = 0.3 ns  
HD = 0.0 ns  
t
GHL= 8.9 ns  
t
Quadrant  
Clocks  
t
CKH = 5.3 ns**  
FMAX = 165 MHz  
* Preliminary values shown for A32200DX-3 at worst-case commercial conditions.  
** Load-dependent.  
18  
Discontinued – v3.0  
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