™
A C T
1 S e r i e s F P G A s
P a c k a g e T h e r m a l C h a r a c t e r i s t i c s
A sample calculation of the maximum power dissipation for
an 84-pin plastic leaded chip carrier at commercial
temperature is as follows:
The device junction to case thermal characteristics is
θjc, and the junction to ambient air characteristics is θja. The
thermal characteristics for θja are shown with two different
air flow rates. Maximum junction temperature is 150°C.
Max junction temp.(°C) – Max commercial temp.(°C)
150°C – 70°C
37°C ⁄ W
------------------------------------------------------------------------------------------------------------------------------------------------- = ---------------------------------- = 2.2 W
θja(°C ⁄ W)
θja
Still Air
θja
300 ft/min
Package Type
Pin Count
θjc
Units
44
68
84
15
13
12
45
38
37
35
29
28
°C/W
°C/W
°C/W
Plastic J-Leaded Chip Carrier
Plastic Quad Flatpack
100
80
13
12
8
48
43
33
40
40
35
20
30
°C/W
°C/W
°C/W
°C/W
Very Thin (1.0 mm) Quad Flatpack
Ceramic Pin Grid Array
84
Ceramic Quad Flatpack
84
5
G e n e r a l P o w e r E q u a t i o n
The power due to standby current is typically a small
component of the overall power. Standby power is calculated
below for commercial, worst case conditions.
P = [ICCstandby + ICCactive] * V + IOL * V * N + IOH
*
CC
OL
(V – V ) * M
CC
OH
ICC
V
Power
CC
Where:
3 mA
5.25 V
5.25 V
3.60 V
3.30 V
15.75 mW (max)
5.25 mW (typ)
2.70 mW (max)
0.99 mW (typ)
ICCstandby is the current flowing when no inputs or
outputs are changing.
1 mA
0.75 mA
0.30 mA
ICCactive is the current flowing due to CMOS switching.
IOL, IOH are TTL sink/source currents.
Ac t iv e P o w e r C o m p o n e n t
V , VOH are TTL level output voltages.
OL
N equals the number of outputs driving TTL loads to
Power dissipation in CMOS devices is usually dominated by
the active (dynamic) power dissipation. This component is
frequency dependent, a function of the logic and the
V .
OL
M equals the number of outputs driving TTL loads to
V .
external I/O. Active power dissipation results from charging
internal chip capacitances of the interconnect,
unprogrammed antifuses, module inputs, and module
outputs, plus external capacitance due to PC board traces
and load device inputs. An additional component of the active
power dissipation is the totem-pole current in CMOS
transistor pairs. The net effect can be associated with an
equivalent capacitance that can be combined with frequency
and voltage to represent active power dissipation.
OH
An accurate determination of N and M is problematical
because their values depend on the family type, design
details, and on the system I/O. The power can be divided into
two components: static and active.
S t a t ic P o w e r C o m p o n e n t
Actel FPGAs have small static power components that result
in lower power dissipation than PALs or PLDs. By integrating
multiple PALs/PLDs into one FPGA, an even greater
reduction in board-level power dissipation can be achieved.
1 -2 8 9
ACTEL [ Actel Corporation ]
