AD9512
Table 11. Pin Function Descriptions
Pin No.
Mnemonic
DSYNC
DSYNCB
VS
Description
1
2
Detect Sync. Used for multichip synchronization.
Detect Sync Complement. Used for multichip synchronization.
Power Supply (3.3 V).
3, 4, 6, 9, 18,
22, 23, 25, 28,
29, 32, 33, 36,
39, 40, 44, 47, 48
5
DNC
Do Not Connect.
7
CLK2
Clock Input.
8
CLK2B
CLK1
CLK1B
FUNCTION
STATUS
SCLK
SDIO
SDO
CSB
GND
Complementary Clock Input. Used in conjunction with CLK2.
Clock Input.
Complementary Clock Input. Used in conjunction with CLK1.
Multipurpose Input. Can be programmed as a reset (RESETB), sync (SYNCB), or power-down (PDB) pin.
Output Used to Monitor the Status of Multichip Synchronization.
Serial Data Clock.
Serial Data I/O.
Serial Data Output.
Serial Port Chip Select.
Ground.
10
11
12
13
14
15
16
17
19, 24, 37,
38, 43, 46
20
21
26
27
30
31
34
35
41
42
45
OUT2B
OUT2
OUT1B
OUT1
OUT4B
OUT4
OUT3B
OUT3
OUT0B
OUT0
RSET
Complementary LVPECL Output.
LVPECL Output.
Complementary LVPECL Output.
LVPECL Output.
Complementary LVDS/Inverted CMOS Output. OUT4 includes a delay block.
LVDS/CMOS Output. OUT4 includes a delay block.
Complementary LVDS/Inverted CMOS Output.
LVDS/CMOS Output.
Complementary LVPECL Output.
LVPECL Output.
Current Set Resistor to Ground. Nominal value = 4.12 kΩ.
Note that the exposed paddle on this package is an electrical connection as well as a thermal enhancement. For the device to
function properly, the paddle must be attached to ground, GND.
Rev. A | Page 18 of 48
ABCO [ ABCO ELECTRONICS CO.LTD ]
