Ai4100
Register Operations
Control
Operations
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Mode 1
0
1
DOUT synchronizes to ADCLK
DOUT synchronizes to OUTCK
DOUT timing
control
0
1
DOUT changes at OUTCK rising edge
DOUT changes at OUTCK falling edge
Normal operation as timing chart
ADCLK clock inversion
OUTCK polarity
ADCLK polarity
0
1
0
0
1
0
1
X
ADIN function OFF
ADIN
connection
ADIN signal to PGA
ADIN signal to ADC
0
1
Reserved
Reserved
Reserved
0
1
Normal operation, ADC data output
ADC output high-Z, or logic of STBY
Normal operation
ADC output
Black level reset
0
1
Black level reset, or logic of RESET
Normal operation
0
1
Power down
Mode 2
Power down, or logic of STBY
0
1
Normal clamp ±50μA
Clamp current
Fast clamp ±100μA
0
1
Clamp operation active for ADIN
No clamp for ADIN
ADIN clamp
Clamp target
0
0
1
1
0
1
0
1
Normal mode, clamp both REFIN and CCDIN
Clamp REFIN only
Clamp CCDIN only
Clamp off
0
0
1
1
0
1
0
1
Normal operation as timing chart
S/H control polarity inversion
Enable control polarity inversion
Both of S/H and enable inversion
Monitor off
S/H, enable
logic
0
0
1
1
0
1
0
1
CDS signal to monitor
Monitor
selection
PGA output monitor
Output REFIN and CCDIN
Mode 3
0
0
1
1
0
1
0
1
CDS gain=0 dB
CDS gain=6.02 dB
CDS gain=12.04 dB
CDS gain=-1.94 dB
Boost control on
Always high gain
CDS gain
control
0
1
Black loop gain
boost
10