X24022
DEVICE ADDRESSING
Following the start condition, the X24022 monitors the
SDA bus comparing the slave address being transmit-
Following a start condition the master must output the
address of the slave it is accessing. The most significant
four bits of the slave address are the device type identifier
(see Figure 4). For the X24022 this is fixed as 1010[B].
ted with its slave address (device type and state of A ,
0
A and A inputs). Upon a correct compare the X24022
1
2
outputs an acknowledge on the SDA line. Depending on
the state of the R/W bit, the X24022 will execute a read
or write operation.
Figure 4. Slave Address
WRITE OPERATIONS
Byte Write
DEVICE TYPE
IDENTIFIER
For a write operation, the X24022 requires a second
address field. This address field is the word address,
comprised of eight bits, providing access to any one of
the 256 words of memory. Upon receipt of the word
address the X24022 responds with an acknowledge,
and awaits the next eight bits of data, again responding
with an acknowledge. The master then terminates the
transferbygeneratingastopcondition,atwhichtimethe
X24022 begins the internal write cycle to the nonvolatile
memory. While the internal write cycle is in progress the
X24022 inputs are disabled, and the device will not
respond to any requests from the master. Refer to
Figure5fortheaddress, acknowledgeanddatatransfer
sequence.
1
0
1
0
A2
A1
A0 R/W
DEVICE
ADDRESS
3848 FHD F09
The next three significant bits address a particular
device. AsystemcouldhaveuptoeightX24022devices
on the bus (see Figure 10). The eight addresses are
defined by the state of the A , A and A inputs.
0
1
2
The last bit of the slave address defines the operation to
be performed. When set to one a read operation is
selected, when set to zero a write operation is selected.
Figure 5. Byte Write
S
T
S
SLAVE
ADDRESS
WORD
ADDRESS
A
R
T
T
BUS ACTIVITY:
MASTER
DATA
O
P
SDA LINE
S
P
A
C
K
A
C
K
A
C
K
BUS ACTIVITY:
X24022
3848 FHD F10
5
XICOR [ XICOR INC. ]
