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X24012SI-3T1 参数 Datasheet PDF下载

X24012SI-3T1图片预览
型号: X24012SI-3T1
PDF下载: 下载PDF文件 查看货源
内容描述: [EEPROM, 128X8, Serial, CMOS, PDSO8, PLASTIC, SOIC-8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 13 页 / 141 K
品牌: XICOR [ XICOR INC. ]
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X24012  
DEVICE OPERATION  
Clock and Data Conventions  
DatastatesontheSDAlinecanchangeonlyduringSCL  
LOW. SDA state changes during SCL HIGH are re-  
served for indicating start and stop conditions. Refer to  
Figures 1 and 2.  
The X24012 supports a bidirectional bus oriented proto-  
col. The protocol defines any device that sends data  
onto the bus as a transmitter, and the receiving device  
as the receiver. The device controlling the transfer is a  
master and the device being controlled is the slave. The  
master will always initiate data transfers and provide the  
clock for both transmit and receive operations. There-  
fore, the X24012 will be considered a slave in all  
applications.  
Start Condition  
All commands are preceded by the start condition,  
which is a HIGH to LOW transition of SDA when SCL is  
HIGH. The X24012 continuously monitors the SDA and  
SCL lines for the start condition and will not respond to  
any command until this condition has been met.  
Figure 1. Data Validity  
SCL  
SDA  
DATA STABLE  
DATA  
CHANGE  
3847 FHD F05  
Figure 2. Definition of Start and Stop  
SCL  
SDA  
START BIT  
STOP BIT  
3847 FHD F06  
3