AH103A
Typical RF Performance at 25°C
Frequency
Gain
Input Return Loss
Output Return Loss
Output IP3
Output P1dB
W-CDMA Ch. Power
@ -45 dBc ACPR
The Communications Edge
TM
Product Information
High Gain, High Linearity �½-Watt Amplifier
Application Circuit: 2110 – 2170 MHz (AH103AG-PCB2140)
2140 MHz
25 dB
24 dB
11 dB
+45 dBm
+26.3 dBm
+18.5 dBm
2.9 dB
+9 V
275 mA
Noise Figure
Supply Voltage
Supply Current
Notes:
1.
A voltage regulator is used in this circuit (U2) to drop the +9 V to a +5 V usable supply for the first internal amplifier. It is permissible to remove the
regulator and operate the 1
st
amplifier stage directly off of +5 V supply onto Test Point 1 (TP1). The use of a +5 V supply on the 1
st
amplifier stage
requires a dropping resistor of 6.8
Ω.
A +4.5 V supply can also be used to bypass the 6.8
Ω
and can be applied to Test Point 2 (TP2).
S-Parameters
Wideband S-Parameters
S22
27
26
Gain (dB)
25
24
23
22
2050
S21
S11
0
-5
S11, S22 (dB)
-10
-15
-20
-25
2250
G a in (d B )
30
20
10
0
-10
-20
S21
S11
S22
-30
0
500
1000 1500 2000 2500 3000
Frequency (MHz)
2100
2150
2200
Frequency (MHz)
Noise Figure
5
N o is e F ig u re (d B )
4
O IP 3 (d B m )
3
2
1
0
2000
48
46
44
42
40
38
2050
2100
Frequency (MHz)
2150
2200
6
8
10
12
14
Output IP3
ACLR vs. Channel Power
3GPP W-CDMA, Test Model 1+64 DPCH, ±5 MHz offset, 2140 MHz
-40
-45
-50
-55
-60
14
15
16
17
18
Output Channel Power (dBm)
19
16
Output Power per tone (dBm)
Specifications and information are subject to change without notice
WJ Communications, Inc
•
Phone 1-800-WJ1-4401
•
FAX: 408-577-6621
•
e-mail: sales@wj.com
•
Web site: www.wj.com
Page 5 of 6 March 2005
A C L R (d B c )