W78E516B
4. PIN DESCRIPTION
SYMBOL
TYPE
DESCRIPTIONS
EA
I
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute the
external ROM. The ROM address and data will not be presented on the bus if
the
Error! Objects cannot be created from editing field codes.
pin is high.
PROGRAM STORE ENABLE:
PSEN
enables the external ROM data in the
Port 0 address/data bus. When internal ROM access is performed, no
PSEN
strobe signal outputs originate from this pin.
ADDRESS LATCH ENABLE: ALE is used to enable the address latch that
separates the address from the data on Port 0. ALE runs at 1/6th of the
oscillator frequency.
RESET: A high on this pin for two machine cycles while the oscillator is
running resets the device.
CRYSTAL 1: This is the crystal oscillator input. This pin may be driven by an
external clock.
CRYSTAL 2: This is the crystal oscillator output. It is the inversion of XTAL1.
GROUND: ground potential.
POWER SUPPLY: Supply voltage for operation.
PSEN
O H
ALE
RST
XTAL1
XTAL2
V
SS
V
DD
P0.0
−
P0.7
P1.0
−
P1.7
P2.0
−
P2.7
P3.0
−
P3.7
P4.0
−
P4.3
O H
I L
I
O
I
I
I/O D PORT 0: Function is the same as that of standard 8052.
I/O H PORT 1: Function is the same as that of standard 8052.
I/O H
PORT 2: Port 2 is a bi-directional I/O port with internal pull-ups. This port also
provides the upper address bits for accesses to external memory.
I/O H PORT 3: Function is the same as that of the standard 8052.
I/O H PORT 4: A bi-directional I/O. See details below.
* Note: TYPE
I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drain
PORT4
Another bit-addressable port P4 is also available and only 4 bits (P4<3:0>) can be used. This port
address is located at 0D8H with the same function as that of port P1.
Example:
P4
MOV
MOV
ORL
ANL
REG
A, P4
P4, #00000001B
P4, #11111110B
0D8H
; Output data "A" through P4.0
−
P4.3.
; Read P4 status to Accumulator.
P4, #0AH
-5-
Publication Release Date: April 20, 2005
Revision A9
WINBOND [ WINBOND ]
