ADVANCE INFORMATION
WCMC1616V9X
Notes:
16. Data I/O is high impedance if OE = V
IH
.
17. If Chip Enable goes INACTIVE simultaneously with WE HIGH, the output remains in a high-impedance state.
18. During the DON’T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied.
Write Cycle No. 3 (WE Controlled, OE LOW)
[17, 18]
tWC
ADDRESS
t SCE
CE
1
CE
2
BHE
/
BLE
tBW
tAW
tSA
tPWE
tHA
WE
t SD
DATAI/O
DON’T CARE
tHD
VALID DATA
tHZWE
tLZWE
Write Cycle No. 4 (BHE /BLE Controlled, OE LOW)
[17, 18]
tWC
ADDRESS
CE
1
CE2
tSCE
tAW
tBW
tHA
BHE/BLE
tSA
WE
tPWE
tSD
DATA I/O
DON’T CARE
t HD
VALID DATA
Document #: 38-14027 Rev. **
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