CHK025A-SOA
25W Power Packaged Transistor
Simulated Source and Load Impedance
VDS = 50V, ID_Q = 200mA
Zload
Zsource
Frequency (MHz)
Source
4.3 + j4
Load
1000
2000
3000
4000
4500
5000
10.9 + j22.45
7.2 + j10.7
4.8 + j1.01
4.27 - j0.38
3.44 - j1.87
2.5 - j3.8
1.5 - j1.5
2.7 - j4.65
3.9 - j8.6
6.4 - j11
7.8 - j3.2
These values are given in the reference plane defined by the connection between the
package leads and the PCB. A gap of 200µm is considered between the edge of the
package and the PCB.
Ref. : DSCHK025ASOA3021 - 21 Jan 13
4/14
Specifications subject to change without notice
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Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34
UMS [ UNITED MONOLITHIC SEMICONDUCTORS ]
