20-40GHz Variable Gain Amplifier
CHA2097a
Typical Bias Tuning
The circuit schematic is given below :
Vd1
Vd 2,3
IN
OUT
Attenuator
Vg1
Vg 3
Vg 2
Vctrl
For gain control operation, The three drain biases are connected altogether. In a same way, all the
gate biases are connected together at the same power supply, tuned to drive a small signal operating
current of 140mA. A separate access to the gate voltages of each stages ( Vg1,2,3 ) is provided for
fine tuning of the stages regarding the application.
An additional pad is provided ( Vctrl ) to control the gain of the circuit, driving two cold transistors in
attenuator arrangement.
Ref. : DSCHA20978021
Specifications subject to change without notice
7/8
Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE
Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
UMS [ UNITED MONOLITHIC SEMICONDUCTORS ]
