TS3300
ELECTRICAL CHARACTERISTICS
VREGIN = VBO = 3V, VREGOUT = 1.8V, VREG EN = HIGH, IREGOUT = 20mA, CREGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless
otherwise noted. See Note 1.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LINEAR REGULATOR
2.5
%
%
2.3V ≤ VREGIN ≤ 5V
0mA ≤ IREGOUT ≤ 20mA
VREG FB = 505mV
DC Output Accuracy
VREGOUT
-40ºC ≤ TA ≤ 85ºC
-3.5
3.5
Input Voltage Range
Output Voltage Range
Input Supply Current
VREGIN
VREGOUT
IREGIN
Guaranteed by design
1.8
1.8
5.25
5
V
V
IREGOUT = 0mA, VREG EN = VREGIN
0.4
1
µA
ꢁVREGOUT
ꢁVREGIN
/
/
Line Regulation
Load Regulation
VREGOUT +0.5V ≤ VREGIN ≤ 5V
-1
1
%
10mA ≤ IREGOUT ≤ 20mA
0mA ≤ IREGOUT ≤ 20mA
-1
1
%
%
ꢁVREGOUT
ꢁIREGOUT
-1.5
1.5
Drop Out Voltage
VDO
ICL
40
150
-70
-50
-36
mV
mA
dB
dB
dB
ms
V
Output Current Limit
f = 10Hz
Power Supply Rejection
Ratio
CREGOUT = 22µF
IREGOUT = 100mA
PSRR
f = 100Hz
f = 1kHz
Startup Time
tSTR
1
VIL (CMOS logic)
VIH (CMOS logic)
0.2 x VREGIN
Linear Regulator Enable
Voltage
VREG EN
0.8 xVREGIN
V
Linear Regulator Enable
Hysteresis
VREG EN_HYST
IREG EN
100
0.9
mV
nA
ꢀ
Enable Pin Current
10
1.2
VSW EN = HIGH. Measured from REGIN to
REGOUT
SWITCH RdsON
RSW
VIL (CMOS logic)
VIH (CMOS logic)
0.2 x VREGIN
V
V
SWITCH Enable Voltage
VSW EN
IREG FB
0.8 xVREGIN
Regulator Feedback Pin
Current
±0.1
±1
nA
Note 1: All devices are 100% production tested at TA = +25°C and are guaranteed by characterization for TA = TMIN to TMAX, as specified.
Page 4
TS3300DS r1p0
RTFDS
TOUCHSTONE [ TOUCHSTONE SEMICONDUCTOR INC ]
