THV3543_Rev.1.00_E
Block Diagram
Vin=12V
THV3543 TFT Multi Channel controller
VCC
VREG5
5V REG
UVLO
SYSUVLO
LX1
TSD
VO1
AVDD
VO1_IN
VO1
LX1
SEL
Max Duty
LX1
Mode
Select
INV1
VREG5
ꢀ
+
op
Comp
+
ꢀ
SS_OK1
SS
VREF
+
ꢀ
STOP
OSC
SS_OK2
PGND
FB1
OVP1
TEST
ꢀ
+
UVP1
LSW_OUT1
PVCC
ꢀ
+
PG_VGL
LSW
VO2_IN
VO2
VREG5
+
ꢀ
ꢀ
+
gm
BST2
Comp
ꢀ
+
SS_OK2
SS
VREF
STOP
OSC
VO2=3.3V
VCC3.3V
UVLO
Max Duty
LL2
LL2
PC2
OVP2
UVP2
ꢀ
+
ꢀ
+
Vin=12V
VO2=3.3V
UVP2
P_GOOD
VO2_OK
LSW_OUT2
PG_LOGIC
V_VGH
AVDD
VGH_FB
VGH
Mode
Select
ꢀ
+
OUT_VGH
VGH
SEL
OSC
SS_OK_LSW
VREF
STOP
VGH_OK
ꢀ
+
PG_VGH
PG_VGH
P_GOOD
VO1
V_VGL
VGL_FB
VGL
VGL
Mode
Select
ꢀ
+
OUT_VGL
STOP
SEL
OSC
ꢀ
+
Vin
PG_VGL
V_AMP
PANEL_EN
NON_AMP
SS_OK1
ꢀ
Op
+
OUT_AMP
INV_AMP
STOP
UVLO
Timer
Latch
UVP1,
UVP2
Error
Detection
OVP2
VCC
PG_VGL,
PG_VGH
VREF
SGND
Vref
OSC
V_VGH
V_LDO
VREF
ꢀ
+
OUT_LDO
INV_LDO
cur_limit
THine Electronics, Inc.
Copyright© 2011 THine Electronics, Inc.
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THINE [ THINE ELECTRONICS, INC. ]
