THCV213-214_Rev.2.40_E
THCV214 Pin Description
PIN Name
RXIN-, RXIN+
D17-D0
PIN No
41, 42
8, 9, 10, 11, 13, OUT
14, 15, 16, 17,
Type
LVDSIN
Description
LVDS input.
Data outputs.
19, 20, 21, 22,
23, 25, 26, 27, 28
SYNC0-SYNC2
DE
CLKOUT
LOCKN
32, 33, 34
31
6
OUT
OUT
OUT
OUT
Sync output.
Data Enable (DE) output.
Clock output.
Lock detects output.
36
H: Unlock, L: Lock.
Can be used as an input signal detector, too.
PDWN
3
IN
H: Normal operation.
L: Power Down, all outputs except LOCKN and
CLKOUT are held low. Refer to Fig9 for details.
(Note1)
EDGE
OE
38
39
IN
IN
Output clock triggering edge select.
H: Rise edge, L: Fall edge.
Output Enable.
(DE, SYNC0-SYNC2, D0-D17,CLKOUT)
H: Output disabled, all outputs are Hi-Z.
L: Output enabled. (Note1)
Select operation mode.
MODE1, MOD0
1, 2
IN
Both must be tied to GND.
MOD0
L
MOD1
L
Normal Mode
Shake Hand Mode
Not Available
Others
RESERVED0
RESERVED1
RESERVED2
VDD
4
45
46
35
30, 37
44
40,43
48
47
5, 12, 24
7, 18, 29
IN
IN
IN
Must be tied to GND.
Must be tied to LVDSGND.
Must be tied to LVDSGND.
Power supply pin for digital circuitry.
Ground pins for digital circuitry.
Power supply pin for LVDS input.
Ground pins for LVDS input.
Power supply pin for PLL circuitry.
Ground pin for PLL circuitry.
Power
Power
Power
Power
Power
Power
Power
Power
GND
LVDSVDD
LVDSGND
PLLVDD
PLLGND
VDDO
Power supply pins for TTL output.
Ground pins for TTL output.
GNDO
Note1: The state of outputs determined by the combination of OE and PDWN is as follow.
Copyright©2014 THine Electronics, Inc.
THine Electronics, Inc.
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THINE [ THINE ELECTRONICS, INC. ]
