THC63LVD1027_Rev.2.0_E
Power Dissipation
Symbol
Parameter
Conditions
CLKIN=40MHz
CLKIN=65MHz
CLKIN=75MHz
CLKIN=85MHz
CLKIN=40MHz
CLKIN=65MHz
CLKIN=75MHz
CLKIN=85MHz
CLKIN=40MHz
CLKIN=65MHz
CLKIN=75MHz
CLKIN=85MHz
CLKIN=20MHz
CLKIN=32.5MHz
CLKIN=37.5MHz
CLKIN=42.5MHz
—
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max Unit
265
305
325
340
215
235
245
260
175
190
200
210
215
235
245
260
8
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Dual-in/Dual-out
Distribution
Operating Current
RL_TX = 100
CL=5pF
RS=VDD
Fig2
ICCW
(Worst Case Pattern)
Fig1
Single-in/Dual-out
Dual-in/Single-out
ICCS
Power Down Current
—
TCLKy+
Txy+
x= A, B, C, D, E
y=1,2
Fig1. Test Pattern (LVDS Output Full Toggle Pattern)
x= A, B, C, CLK, D, E
y=1,2
Txy+
Txy-
5pF
100
LVDS Output Load
Fig2. LVDS Output Load
Copyright©2010 THine Electronics, Inc.
7/22
THine Electronics,Inc.
THINE [ THINE ELECTRONICS, INC. ]
