DS_8024RN_020
73S8024RN Data Sheet
1 Pin Description
CARD INTERFACE
Name
Pin
Pin
Pin
Description
28SO
20QFN 32QFN
I/O
11
13
12
5
–
–
8
Card I/O: Data signal to/from card. Includes a pull-up
resistor to VCC.
AUX1
AUX2
11
10
AUX1: Auxiliary data signal to/from card. Includes a
pull-up resistor to VCC.
AUX2: Auxiliary data signal to/from card. Includes a
pull-up resistor to VCC.
RST
CLK
16
15
8
7
14
13
Card reset: provides reset (RST) signal to card.
Card clock: provides clock signal (CLK) to card. The rate
of this clock is determined by the external crystal
frequency or frequency of the external clock signal applied
on XTALIN and CLKDIV selections.
PRES
PRES
VCC
10
9
4
3
9
6
7
6
Card Presence switch: active high indicates card is
present. Should be tied to GND when not used, but it
Includes a high-impedance pull-down current source.
Card Presence switch: active low indicates card is
present. Should be tied to VDD when not used, but it
Includes a high-impedance pull-up current source.
17
14
15
12
Card power supply – logically controlled by sequencer,
output of LDO regulator. Requires an external filter
capacitor to the card GND.
GND
Card ground.
MISCELLANEOUS INPUTS AND OUTPUTS
Name
Pin
Pin
Pin
Description
28SO
20QFN 32QFN
XTALIN
24
25
18
15
16
–
23
24
17
Crystal oscillator input: can either be connected to crystal
or driven as a source for the card clock.
XTALOUT
VDDF_ADJ
Crystal oscillator output: connected to crystal. Left open
if XTALIN is being used as external clock input.
VDD fault threshold adjustment input: this pin can be used
to adjust the VDDF values (that controls deactivation of the
card). Must be left open if unused.
NC
5
–
2, 9,
16, 25,
32
Non-connected pin.
POWER SUPPLY AND GROUND
Name
Pin
Pin
Pin
Description
28SO
20QFN 32QFN
VDD
21
12
20
System interface supply voltage and supply voltage for
internal circuitry.
VPC
GND
GND
6
4
2
1
3
1
LDO regulator power supply source.
LDO Regulator ground.
Digital ground.
22
13
21
Rev. 1.8
5
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
