73S8010R
Low Cost Smart Card Interface
DATA SHEET
FUNCTIONAL DIAGRAM
VDD [20] 21
VDDF_ADJ
GND [2] 5
VPC [3] 6
[17] 18
[4, 5, 6, 9, 16, 25, 32]N7,C8, 9
G[N21D] 22
VPC FAULT
VCC FAULT
[1] G4 ND
VDD FAULT
VDD VOLTAGE SUPERVISOR
VOLTAGE REFERENCE
LDO
REGULATOR
&
[12] 14
GND
VOLTAGE
SUPERVISORS
[18] 19
SCL
[15] 17
VCC
Int_Clk
R-C
[19] 20
OSC.
SDA
I2C
DIGITAL
&
[29] 1
SAD0
ICC RESET
BUFFER
[14] 16
RST
[30] 2
SAD1
[31] 3
FAULT LOGIC
SAD2
[22] 23
INT
ICC CLOCK
BUFFER
[13] 15
CLK
ISO-7816
SEQUENCER
[7] P10RES
[23] 24
XTALIN
CLOCK
XTAL
OSC
[24] 25
XTALOUT
OVER
TEMP
GENERATION
TEMP FAULT
[8] I1/1O
[11] 13
AUX1
[10] 12
IO[U26C] 26
AUX1[U27C] 27
AUX2[U28C] 28
ICC I/O BUFFERS
AUX2
Pin numbers reference to the SO28 package
[Pin numbers] reference to the QFN32 Package
Figure 1: 73S8010R Block Diagram
Page: 2 of 24
© 2005-2008 TERIDIAN Semiconductor Corporation
Rev 1.5
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
