73S1209F Data Sheet
DS_1209F_004
Figures
Figure 1: IC Functional Block Diagram ......................................................................................................... 7
Figure 2: Memory Map................................................................................................................................ 15
Figure 3: Clock Generation and Control Circuits ........................................................................................ 24
Figure 4: Oscillator Circuit........................................................................................................................... 26
Figure 5: Power-Down Control.................................................................................................................... 27
Figure 6: Detail of Power-Down Interrupt Logic.......................................................................................... 28
Figure 7: Power-Down Sequencing ............................................................................................................ 28
Figure 8: External Interrupt Configuration................................................................................................... 32
Figure 9: I2C Write Mode Operation........................................................................................................... 55
Figure 10: I2C Read Operation.................................................................................................................... 56
Figure 11: Simplified Keypad Block Diagram.............................................................................................. 61
Figure 12: Keypad Interface Flow Chart ..................................................................................................... 63
Figure 13: Smart Card Interface Block Diagram......................................................................................... 68
Figure 14: External Smart Card Interface Block Diagram........................................................................... 69
Figure 15: Asynchronous Activation Sequence Timing .............................................................................. 72
Figure 16: Deactivation Sequence.............................................................................................................. 72
Figure 17: Smart Card CLK and ETU Generation ...................................................................................... 73
Figure 18: Guard, Block, Wait and ATR Time Definitions........................................................................... 74
Figure 19: Synchronous Activation ............................................................................................................. 76
Figure 20: Example of Sync Mode Operation: Generating/Reading ATR Signals ..................................... 76
Figure 21: Creation of Synchronous Clock Start/Stop Mode Start Bit in Sync Mode................................. 77
Figure 22: Creation of Synchronous Clock Start/Stop Mode Stop Bit in Sync Mode ................................. 77
Figure 23: Operation of 9-bit Mode in Sync Mode ...................................................................................... 78
Figure 24: 73S1209F Typical PINpad, Smart Card Reader Application Schematic................................. 103
Figure 25: 73S1209F Typical SIM / Smart Card Reader Application Schematic ..................................... 104
Figure 26: 12 MHz Oscillator Circuit ......................................................................................................... 110
Figure 27: Digital I/O Circuit...................................................................................................................... 110
Figure 28: Digital Output Circuit................................................................................................................ 111
Figure 29: Digital I/O with Pull Up Circuit.................................................................................................. 111
Figure 30: Digital I/O with Pull Down Circuit ............................................................................................. 112
Figure 31: Digital Input Circuit................................................................................................................... 112
Figure 32: Keypad Row Circuit ................................................................................................................. 113
Figure 33: Keypad Column Circuit............................................................................................................ 113
Figure 34: LED Circuit............................................................................................................................... 114
Figure 35: Test and Security Pin Circuit ................................................................................................... 114
Figure 36: Analog Input Circuit.................................................................................................................. 115
Figure 37: Smart Card Output Circuit ....................................................................................................... 115
Figure 38: Smart Card I/O Circuit.............................................................................................................. 116
Figure 39: PRES Input Circuit................................................................................................................... 116
Figure 40: PRES Input Circuit................................................................................................................... 116
Figure 41: 73S1209F Pinout ..................................................................................................................... 117
Figure 42: 73S1209F Pinout ..................................................................................................................... 118
Figure 43: 73S1209F 68 QFN Pinout ....................................................................................................... 119
Figure 44: 73S1209F 44 QFN Pinout ....................................................................................................... 120
4
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
