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73M1903C-IM/F 参数 Datasheet PDF下载

73M1903C-IM/F图片预览
型号: 73M1903C-IM/F
PDF下载: 下载PDF文件 查看货源
内容描述: 调制解调器模拟前端 [Modem Analog Front End]
分类和应用: 调制解调器
文件页数/大小: 46 页 / 452 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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73M1903C  
Modem Analog Front End  
DATA SHEET  
SLAVE MODE AND DAISY CHAIN  
If the SCLK pin is externally pulled down to ground by a <4.7Kresistor, the 79M1903C device is in the  
slave mode, after reset. In this mode of operation the serial clock (SCLK) and FS are inputs to 79M1903C  
provided by the Master device. The serial clock input must be connected to OSCIN pin while SCLK pin of  
73M1903C is unconnected, except for the resistor connected to ground (see Figures 4 and 5). The  
73M1903C PLL must be programmed to multiply the serial clock frequency by an appropriate factor in  
order to obtain Fsys. Therefore the serial clock has to be continuous and without low frequency jitter (the  
high frequency jitter is rejected by the 79M1903C PLL). The SckMode pin is not used since the Master  
device provides FS and serial clock.  
73M1903C  
73M1903C  
MCLK  
(Master)  
OSCIN  
SCLK  
OSCIN  
(Slave)  
SDOUT  
SDIN  
SDIN  
SDOUT  
SDIN  
SDIN  
SDOUT  
SDOUT  
HOST  
HOST  
(Master)  
(Slave)  
"x"  
"x"  
"1/0"  
"1/0"  
FS  
FS  
FS  
FS  
SckMode  
SckMode  
TYPE  
SCLK  
SCLK  
TYPE  
SCLK  
"x" : don't care  
73M1903C Master Mode  
73M1903C Slave Mode  
Figure 4: 73M1903C Host connection in master and slave mode  
73M1903C  
73M1903C  
MCLK  
SCLK  
SDOUT  
SDIN  
OSCIN (Master)  
OSCIN (Slave)  
SDOUT  
SDIN  
SDIN  
SDOUT  
FS  
SDIN  
SDOUT  
HOST  
HOST  
"x"  
"x"  
FS  
(Slave)  
FS  
FS  
(Master)  
SckMode  
"1/0"  
"1/0"  
SckMode  
SCLK  
SCLK  
FSBD  
TYPE  
SCLK  
TYPE  
FSBD  
73M1903C  
73M1903C  
OSCIN  
(Slave)  
OSCIN  
(Slave)  
"x" : don't care  
SDIN  
SDIN  
SDOUT  
SDOUT  
"x"  
"x"  
"x"  
"x"  
FS  
FS  
SckMode  
SckMode  
SCLK  
TYPE  
SCLK  
TYPE  
Daisy chain for Slave mode  
Figure 5: 73M1903C Daisy chaining for master/slave mode and slave modes  
Daisy chain for Master/Slave mode  
In order to daisy chain two or more 73M1903C devices, the master must be programmed into hardware  
controlled control frame mode by setting the HC bit (bit 0 in Register01) to “1”, then set FSDEn (bit 3 in  
Register06), and then set CkoutEn bit (bit 3 in Register01) to allow the FSD to come through. The first  
Page: 9 of 46  
© 2005-2008 TERIDIAN Semiconductor Corporation  
Rev 4.3