73K324L
CCITT V.22bis,V.23,V.22,V.21, Bell 212A
Single-Chip Modem
DATA SHEET
CONTROL REGISTER 0 (continued)
BIT NO.
NAME
CONDITION
DESCRIPTION
D6,D5
Modulation
Type
D6
1
D5
0
QAM
DPSK
FSK
0
0
0
1
D7
Modulation
Option
0
1
QAM selects 2400 bit/s. DPSK selects 1200 bit/s.
FSK selects V.23 mode.
DPSK selects 600 bit/s.
FSK selects V.21 mode.
CONTROL REGISTER 1
D7
D6
D5
D4
D3
D2
D1
D0
TRANSMIT
PATTERN
1
TRANSMIT
PATTERN
0
ENABLE
DETECT
INT.
BYPASS
SCRAMB/
ADD
CLK
CONTROL
RESET
TEST
MODE
1
TEST
MODE
0
CR1
001
PH.EQ
BIT NO.
NAME
CONDITION
DESCRIPTION
D1
0
D0
0
D1, D0
Test Mode
Selects Normal Operating mode.
0
1
Analog Loopback mode. Loops the transmitted analog
signal back to the receiver, and causes the receiver to
use the same carrier frequency as the transmitter. To
squelch the TXA pin, transmit enable bit must be low.
Tone Register bit D2 must be zero.
1
1
0
1
Selects remote digital loopback. Received data is looped
back to transmit data internally, and RXD is forced to a
mark. Data on TXD is ignored.
Selects local digital loopback. Internally loops TXD back to
RXD and continues to transmit data carrier at TXA pin.
D2
D3
Reset
0
1
Selects normal operation.
Resets modem to power down state. All control register
bits (CR0, CR1, CR2, CR3 and Tone) are reset to zero
except CR3 bit D2. The output of the clock pin will be set
to the crystal frequency.
CLK Control
(Clock Control)
0
1
Selects 11.0592 MHz crystal echo output at CLK pin.
Selects 16 X the data rate output at CLK pin in QAM and
DPSK only.
Page: 9 of 30
© 2005, 2008 TERIDIAN Semiconductor Corporation
Rev 7.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
