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73K222BL-IH/F 参数 Datasheet PDF下载

73K222BL-IH/F图片预览
型号: 73K222BL-IH/F
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片调制解调器 [Single-Chip Modem]
分类和应用: 调制解调器电信集成电路电信电路
文件页数/大小: 26 页 / 168 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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73K222BL  
V.22, V.21, Bell 212A, 103 Single-Chip  
Modem with Integrated Hybrid  
DATA SHEET  
REGISTER DESCRIPTIONS  
Four 8-bit internal registers are accessible for  
control and status monitoring. The registers are  
accessed in read or write operations by  
addressing AD0, AD1 and AD2 lines. The address  
lines are latched by ALE. Register CR0 controls  
the method by which data is transferred over the  
phone line. CR1 controls the interface between the  
microprocessor and the 73K222BL internal state.  
DR is the Detect Register, which provides an  
indication of monitored modem status conditions.  
TR, the Tone Control Register, controls the DTMF  
generator, answer and guard tones and RXD  
output gate used in the modem initial connect  
sequence. All registers are read/write except for  
DR, which is read only. Register control and status  
bits are identified below:  
REGISTER BIT SUMMARY  
ADDRESS  
DATA BIT NUMBER  
REGISTER  
AD2 - AD0  
D7  
D6  
0
D5  
D4  
D3  
D2  
D1  
D0  
TRANSMIT  
MODE  
3
TRANSMIT  
MODE  
2
TRANSMIT  
MODE  
1
TRANSMIT  
MODE  
0
CONTROL  
REGISTER  
0
MODULATION  
OPTION  
TRANSMIT  
ENABLE  
ORIGINATE/  
ANSWER  
CR0  
000  
0 = 1200 BIT/S DPSK  
1 = 600 BIT/S DPSK  
0 = BELL 103 FSK  
1 = V.21 FSK  
0 = ANSWER  
1 = ORIGINATE  
0000 = PWR DOWN  
0001 = INT SYNCH  
0010 = EXT SYNCH  
0011 = SLAVE SYNCH  
0 = DISABLE  
TXA OUTPUT  
1 = ENABLE  
TXA OUTPUT  
0100 = ASYNCH 8 BITS/CHAR  
0101 = ASYNCH 9 BITS/CHAR  
0110 = ASYNCH 10 BITS/CHAR  
0111 = ASYNCH 11 BITS/CHAR  
1100 = FSK  
TRANSMIT  
PATTERN  
1
TRANSMIT  
PATTERN  
0
ENABLE  
DETECT  
INTERRUPT  
TEST  
MODE  
1
TEST  
MODE  
0
CONTROL  
REGISTER  
1
BYPASS  
SCRAMBLER  
CLK  
CONTROL  
001  
RESET  
CR1  
00 = TX DATA  
01 = TX ALTERNATE  
10 = TX MARK  
0 = DISABLE 0 = NORMAL  
1 = ENABLE 1 = BYPASS  
0 = XTAL  
1 = 16 X DATA  
0 = NORMAL  
1 = RESET  
00 = NORMAL  
01 = ANALOG LOOPBACK  
10 = REMOTE DIGITAL  
LOOPBACK  
SCRAMBLER RATE OUTPUT  
AT CLK PIN IN  
11 = TX SPACE  
DPSK MODE  
ONLY  
11 = LOCAL DIGITAL  
LOOPBACK  
DETECT  
REGISTER  
RECEIVE  
DATA  
UNSCR.  
MARKS  
CARRIER  
DETECT  
ANSWER  
TONE  
CALL  
PROGRESS  
LONG  
LOOP  
X
X
DR  
010  
OUTPUTS  
RECEIVED  
0 = CONDITION NOT DETECTED  
1 = CONDITION DETECTED  
DATA STREAM  
DTMF0/  
GUARD/  
ANSWER/  
TONE  
RXD  
OUTPUT  
CONTROL  
TRANSMIT  
GUARD/  
TONE  
TRANSMIT  
ANSWER  
TONE  
TONE  
CONTROL  
REGISTER  
TRANSMIT  
DTMF  
DTMF1/  
OVERSPEED  
011  
DTMF3  
DTMF2  
TR  
0 = Disable DTMF  
1 = TX DTMF  
RXD PIN  
0 = NORMAL  
1 = WEAK PULL-UP  
0 = OFF  
1 = ON  
4 BIT CODE FOR 1 OF 16  
DUAL TONE COMBINATIONS  
0 = OFF  
1 = ON  
0 = 2225 Hz A.T.  
1800 Hz G.T.  
1 = 2100 Hz A.T.  
500 Hz G.T.  
ID  
X
X
X
X
10  
110  
1
0
X
OH  
REGISTER  
00XX = 73K212AL, 322L, 321L  
01XX = 73K221AL, 302L  
10XX = 73K222AL, 222BL  
1100 = 73K224L, 224BL  
1110 = 73K324L, 324BL  
X = Undefined, mask in software  
0 = OH Relay driver open  
1 = OH Open drain driver pulling low  
NOTE: When a register containing reserved control bits is written into, the reserved bits must be  
programmed as 0's.  
X = Undefined, mask in software  
Page: 8 of 26  
© 2005, 2008 TERIDIAN Semiconductor Corporation  
Rev 7.2