FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
Table 53: I/O RAM Map in Functional Order...............................................................................................72
Table 54: I/O RAM Description - Alphabetical ............................................................................................77
Table 55: CE EQU[2:0] Equations and Element Input Mapping.................................................................89
Table 56: CESTATUS (CE RAM 0x80) Bit Definitions..................................................................................90
Table 57: CECONFIG Bit Definitions...........................................................................................................91
Table 58: Sag Threshold Control................................................................................................................91
Table 59: Gain Adjust Control.....................................................................................................................91
Table 60: CE Transfer Variables.................................................................................................................92
Table 61: CE Energy Measurement Variables............................................................................................92
Table 62: Useful CE Measurement Parameters .........................................................................................93
Table 63: CE Pulse Generation Parameters...............................................................................................94
Table 64: CE Calibration Parameters .........................................................................................................94
Table 65: CE Parameters for Noise Suppression and Code Version.........................................................95
Table 66: Absolute Maximum Ratings ........................................................................................................98
Table 67: Recommended External Components........................................................................................99
Table 68: Recommended Operating Conditions.........................................................................................99
Table 69: Input Logic Levels.....................................................................................................................100
Table 70: Output Logic Levels ..................................................................................................................100
Table 71: Power-Fault Comparator Performance Specifications.............................................................100
Table 72: Battery Monitor Performance Specifications (BME= 1).............................................................100
Table 73: Supply Current Performance Specifications.............................................................................101
Table 74: V3P3D Switch Performance Specifications..............................................................................101
Table 75: 2.5 V Voltage Regulator Performance Specifications...............................................................101
Table 76: Low-Power Voltage Regulator Performance Specifications.....................................................101
Table 77: Crystal Oscillator Performance Specifications..........................................................................102
Table 78: LCD DAC Performance Specifications .....................................................................................102
Table 79: LCD Driver Performance Specifications ...................................................................................102
Table 80: Optical Interface Performance Specifications...........................................................................102
Table 81: Temperature Sensor Performance Specifications....................................................................103
Table 82: VREF Performance Specifications............................................................................................103
Table 83: ADC Converter Performance Specifications.............................................................................104
Table 84: Flash Memory Timing Specifications........................................................................................105
Table 85: EEPROM Interface Timing........................................................................................................105
Table 86: RESET Timing ..........................................................................................................................105
Table 87: SPI Slave Port (MISSION Mode) Timing..................................................................................106
Table 88: Recommended PCB Land Pattern Dimensions........................................................................110
Table 89: Power and Ground Pins............................................................................................................113
Table 90: Analog Pins...............................................................................................................................113
Table 91: Digital Pins ................................................................................................................................114
v1.3
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