Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
System
Power
(V3P3SYS)
V1_OK
Battery
Current
300nA
BROWNOUT
Transition
MISSION
MPU Mode
WAKE
13..14 CK
cycles
MPU Clock
Source
PLL
(4.2MHz/MUX_DIV)
Xtal
2048...4096
CK32 cycles
PLL_OK
time
Figure 22: Transition from BROWNOUT to MISSION Mode when System Power Returns
V3P3SYS
and VBAT
V1_OK
Battery
300nA
Current
BROWN-
OUT
MISSION
MPU Mode
MPU Clock
Source
PLL
(4.2MHz)
Xtal
14.5 CK32
cycles
WAKE
4096 CK32
cycles
PLL_OK
Internal
RESETZ
1024 CK32
cycles
time
Figure 23: Power-Up Timing with V3P3SYS and VBAT tied together
58
© 2005-2009 TERIDIAN Semiconductor Corporation
v1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
