71M6403
Electronic Trip Unit
SEPTEMBER 2006
VREF VBIAS
V3P3A GNDA GNDA
I0
∆Σ ADC
CONVERTER
I1
VBIAS
V3P3A
I2
MUX
VOLTAGE
I3
BOOST
VDRV
-
I4
FIR
LCD_IBST
I5
INEUTRA
L
+
FILTER
LCD_BSTEN
VREF
CHOP_EN
VREF_DIS
FIR_LEN
VREF
GNDD
GNDD
TEMP
MUX
CTRL
CK32
VOLT
MUX_ALT
MUX_DIV
REG
V3P3D
VBAT
GNDD
GNDD
38kHz
CLK
PLLOUT
CK38
CK
divider
19.66MH
z
V2P5
V2P5
CK_EN
CKFIR
4.9MHz
2.5V to logic
CKTEST
4.9MHz
VLCD
CKOUT_EN
CK_GEN
CE DATA
RAM
SSI
ECK_DIS
MPU_DIV
(1KB)
MUX_SYNC
STRT
FAULT_PULSE
STROBE
RTM
DATA
00-FF
MUX
CKCE
4.9MHz
CE
COM0..3
LCD DISPLAY
32-bit Compute
Engine
DRIVER
MEMORY
SHARE
TEST3
SEG6/SRDY
LCD_EN
LCD_FS
SEG0..2, SEG3/SCLK,
LCD_MODE
LCD_NUM
LCD_MODE
SEG4/SSDATA,
PROG
1000-13FF
SEG5/SFR, SEG7..19
CE
000-7FF
CONTROL
LCD_CLK
SEG20..23
SEG24/DIO4 ..
SEG27/DIO7
DIGITAL I/O
PRE_SAMPS
SUM_CYCLES
RTM_EN
CE_EN
DIO_EEX
FAULT_PULSE
STROBE
SEG28/DIO8 ..
SEG31/DIO11
SEG32/DIO12 ..
SEG41/DIO21
FAULT_PULSE
STROBE
DIO_IN
CE_RUN
DIO_OUT
CE PROG
LCD_NUM
DIO_GP
RAM
(4KB)
DIO_0..3
3000-3FFF
CE_LOAD
RTC
CKMPU
RTCLK
RTC_HOLD
RTC_SET
EEPROM
CONFIGURATION
PARAMETERS
INTERFACE
CONFIG
RAM
SCL
SDA
TX
RX
(I/O RAM)
2000-20FF
UART
DMUX
F
DATA
XFER_BUSY
CE_BUSY
0000-FFFF
MPU
E
D
C
B
(80515)
0000-07FF
RTCLK
reserved
CK_MPU
CK_10M
MUX_SYNC
OPTRX
V3 OK
V2 OK
WDTR_EN
RTM
MPU XRAM
(2KB)
OPT_TX
OPT_RX
OPTICAL
I/F
A
DIGITAL
PROG
0000-FFFF
FLASH
9
8
7
6
5
4
3
2
1
0
(64KB)
OPT_TXDIS
EERDSLOW
EEWRSLOW
VBIAS
WATCHDOG
WAKE
V1
V2
EMULATOR
PORT
POWER FAULT
VBIAS
PLL_2.5V
IBIAS
V3P3
GENERATOR AND
COMPARATORS
ANALOG
FAULTZ
INEUTRAL
TMUXOUT
COMP_STAT
COMP_INT
DGND
TMUX
September 9, 2006
RESETZ
Figure 1: IC Functional Block Diagram
Page: 7 of 75
© 2006 TERIDIAN Semiconductor Corporation
REV 1.0
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
