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HV5530PJ-G 参数 Datasheet PDF下载

HV5530PJ-G图片预览
型号: HV5530PJ-G
PDF下载: 下载PDF文件 查看货源
内容描述: [EL Driver, 32-Segment, CMOS, PQCC44, 0.653 X 0.653 INCH, 0.180 INCH HEIGHT, 1.27 MM PITCH, GREEN, PLASTIC, LCC-44]
分类和应用: 驱动接口集成电路
文件页数/大小: 8 页 / 719 K
品牌: SUPERTEX [ Supertex, Inc ]
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HV5530  
Ordering Information  
Package Options  
44-Lead Quad  
44-Lead Quad  
Device  
Plastic Gullwing  
10.00x10.00mm body  
2.45mm height (max)  
0.80mm pitch  
Plastic Chip Carrier  
.653x.653in body  
.180in height (max)  
.050in pitch  
HV5530  
HV5530PG-G  
HV5530PJ-G  
-G indicates package is RoHS compliant (‘Green’)  
Pin Configurations  
Absolute Maximum Ratings  
Parameter  
Value  
-0.5V to +15V  
-0.5V to +315V  
-0.5V to VDD +0.5V  
1.5A  
1
Supply voltage, VDD  
1
Output voltage, VPP  
44  
Logic input levels1  
1
Ground current2  
44-Lead PQFP (PG)  
Continuous total power dissipation3  
Operating temperature range  
Storage temperature range  
1200mW  
(top view)  
6
40  
1 44  
-40OC to +85OC  
-65OC to +150OC  
Absolute Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation under these conditions is not implied. Continuous operation of the device  
at the absolute rating level may affect device reliability. All voltages are referenced to device  
ground.  
Notes:  
1. All voltages are referenced to VSS  
44-Lead PLCC (PJ)  
2. Duty cycle is limited by the total power dissipated in the package  
3. For operation above 25°C ambient derate linearly to maximum operating  
temperature at 20mW/°C.  
(top view)  
Product Marking  
Top Marking  
YYWW  
HV5530PG  
LLLLLLLLL  
YY = Year Sealed  
WW = Week Sealed  
L = Lot Number  
Recommended Operating Conditions  
Sym Parameter  
Min  
10.8  
-0.3  
Max Units  
C = Country of Origin*  
A = Assembler ID*  
Bottom Marking  
VDD Logic voltage supply  
HVOUT High voltage output  
13.2  
V
V
CCCCCCCC  
AAA  
= “Green” Packaging  
+300  
*May be part of top marking  
VIH  
VIL  
Input high voltage  
Input low voltage  
VDD -2.0 VDD  
V
Package may or may not include the following marks: Si or  
44-Lead PQFP (PG)  
Top Marking  
0
-
2.0  
8.0  
V
fCLK Clock frequency  
MHz  
OC  
YY = Year Sealed  
YYWW AAA  
HV5530PJ  
LLLLLLLLLL  
WW = Week Sealed  
TA  
Operating free-air temperature  
-40  
+85  
L = Lot Number  
A = Assembler ID  
Bottom Marking  
C = Country of Origin*  
Power-Up Sequence  
Power-up sequence should be the following:  
1. Connect ground  
= “Green” Packaging  
CCCCCCCCCCC  
*May be part of top marking  
2. Apply VDD  
Package may or may not include the following marks: Si or  
3. Set all inputs to a known state  
44-Lead PLCC (PJ)  
Power-down sequence should be the reverse of the above.  
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com  
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