HV3418
Electrical Characteristics (over recommended operating conditions unless noted)
DC Characteristics
Symbol
Parameter
Min
Typ
Max
Units
Conditions
IDD
VDD Supply Current
25
mA
fCLK = 12MHz, fDATA = 12MHz
LE = LOW
IDDQ
IPP
Quiescent VDD Supply Current
High Voltage Supply Current
200
0.50
0.50
10
µA
mA
mA
µA
µA
V
All VIN = 0V or VDD
VPP = 180V All outputs high
VPP = 180V All outputs low
VIH = VDD
IIH
High-Level Logic Input Current
Low-Level Logic Input Current
High-Level Output
IIL
-10
VIL = 0V
VOH
HVOUT
155
VPP = 180V, IHVOUT = -5mA
IDOUT = -100µA
Data Out
HVOUT
V
DD -1V
V
VOL
Low-Level Output
25
1.0
V
VPP = 180V, IHVOUT = +5mA
IDOUT = +100µA
Data Out
V
VOC
HVOUT Clamp Voltage
VPP +1.5
-1.5
V
IOL = +5mA
V
IOL = -5mA
AC Characteristics1,2 (For VDD = 12V: values in parentheses are for VDD = 5V; VPP = 180V, TA = 25°C)
Symbol
fCLK
tW
Parameter
Min
Typ
Max
Units
MHz
ns
Conditions
Clock Frequency
Clock Width High and Low
12(6)
High
40(83)
25(35)
10(30)
62(80)
25(35)
30(40)
tSU
Data Setup Time Before Clock Rises
Data Hold Time After Clock Rises
Width of Latch Enable Pulse
ns
tH
ns
tWLE
tDLE
tSLE
ns
LE Delay Time Rising Edge of Clock
LE Setup Time Before Rising Edge of Clock
Time from Latch Enable to HVOUT
Delay Time Clock to Data High to Low
Delay Time Clock to Data Low to High
All Logic Inputs
ns
ns
t
ON, tOFF
1(1.5)
50(110)
75(160)
5
µs
CL = 20pF
tDHL
tDLH
tr, tf
ns
CL = 20pF
CL = 20pF
ns
ns
Notes:
1. Shift register speed can be as low as DC as long as Data Set-up and Hold Time meet the spec.
2. AC Characteristics are guaranteed only under VDD = 12V and VDD = 5V.
Recommended Operating Conditions
Symbol
Parameter
Min
Typ
Max
5.5
Units
VDD
Logic supply voltage
VDD = 5V
VDD =12V
4.5
10.8
60
5.0
V
V
V
V
V
12.0
13.2
180
VDD
0.9
VPP
VIH
VIL
TA
High voltage supply
High-level input voltage
Low-level input voltage
VDD -0.9
0
Operating free-air temperature
Plastic
-40
+85
+125
°C
Ceramic
-55
Notes:
Power-up sequence should be the following:
1. Connect ground.
4. Apply VPP
.
2. Apply VDD
.
5. The VPP should not drop below VDD or float during operation.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
Power-down sequence should be the reverse of the above.
2
SUPERTEX [ Supertex, Inc ]
