PRELIMINARY
ICS889832
Integrated
Circuit
Systems, Inc.
LOW SKEW, 1-TO-4 DIFFERENTIAL-
TO-LVDS FANOUT BUFFER
TABLE 4D. LVDS DC CHARACTERISTICS, VDD = 2.5V 5ꢀ;TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
Typical
TBD
Maximum Units
VOD
Differential Output Voltage
mV
mV
V
Δ VOD
VOS
VOD Magnitude Change
Offset Voltage
TBD
TBD
Δ VOS
VOS Magnitude Change
TBD
mV
TABLE 5. AC CHARACTERISTICS, VDD = 2.5V 5ꢀ;TA = -40°C TO 85°C
Symbol Parameter Condition
Minimum Typical Maximum Units
fMAX
Maximum Output Frequency
>2
GHz
Propagation Delay; (Differential);
NOTE 1
tPD
460
ps
tsk(o)
Output Skew; NOTE 2, 4
TBD
TBD
ps
ps
tsk(pp)
Part-to-Part Skew; NOTE 3, 4
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter section
155.52MHz, Integration
Range: 12kHz - 20MHz
tjit
TBD
210
ps
tR/tF
tS
Output Rise/Fall Time
20ꢀ to 80ꢀ
ps
ps
ps
Clock Enable Setup Time EN to IN, nIN
300
300
tH
Clock Enable Hold Time
EN to IN, nIN
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
889832AK
www.icst.com/products/hiperclocks.html
REV. A JANUARY 23, 2006
5