PRELIMINARY
ICS889832
Integrated
Circuit
Systems, Inc.
LOW SKEW, 1-TO-4 DIFFERENTIAL-
TO-LVDS FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
1, 2
Name
Q1, nQ1
Q2, nQ2
Q3, nQ3
VDD
Type
Description
Output
Output
Output
Power
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Differential output pair. LVDS interface levels.
Positive supply pins.
3, 4
5, 6
7, 14
Synchronizing clock enable. When LOW, Q outputs will go LOW and nQ
outputs will go HIGH on the next LOW transition at IN inputs. Input
threshold is VDD/2V. Includes a 37kΩ pull-up resistor. Default state is
HIGH when left floating. The internal latch is clocked on the falling edge
of the input signal IN. LVTTL / LVCMOS interface levels.
8
EN
Input
Pullup
9
10
nIN
VREF_AC
VT
Input
Output
Input
Inverting differential clock input. 50Ω internal input termination to VT.
Reference voltage for AC-coupled applications.
Termination input.
11
12
IN
Input
Non-inverting differential clock input. 50Ω internal input termination to VT.
Power supply ground.
13
GND
Q0, nQ0
Power
Output
15, 16
Differential output pair. LVDS interface levels.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol Parameter
Test Conditions
Minimum
Typical
Maximum
Units
RPULLUP
Input Pullup Resistor
37
kΩ
889832AK
www.icst.com/products/hiperclocks.html
REV.A JANUARY 23, 2006
2
SPECTRUM [ SPECTRUM MICROWAVE, INC. ]
