W137
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
periods may affect reliability.
.
Parameter
VDD, VIN
TSTG
TA
Description
Rating
Unit
Voltage on any pin with respect to GND
–0.± to +7.0
V
Storage Temperature
–6± to +1±0
0 to +70
°C
°C
°C
kV
Operating Temperature
Ambient Temperature under Bias
Input ESD Protection
TB
–±± to +12±
2 (min.)
ESDPROT
DC Electrical Characteristics:
TA = 0°C to +70°C; VDDQ3 = 3.3V±±%; VDDQ2 = 2.±V±±%; CPU0:1 = 66.6/100 MHz
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Supply Current
IDD3PD
IDD3
3.3V Supply Current in Power-down mode
3.3V Supply Current
PWR_DWN# = 0
Outputs Loaded[1]
Outputs Loaded[1]
PWR_DWN# = 0
1
80
±
100
4±
1
mA
mA
mA
mA
IDD2
2.±V Supply Current
30
IDD2PD
2.±V Supply Current in Power-down mode
0.2 µA
Logic Inputs
VIL
Input Low Voltage
GND – 0.3
2.0
0.8
VDD + 0.3
–2±
V
VIH
IIL
Input High Voltage
V
Input Low Current[2]
µA
µA
µA
µA
IIH
IIL
Input High Current[2]
10
Input Low Current (SEL100/66#)
Input High Current (SEL100/66#)
–±
IIH
+±
Clock Outputs
VOL
VOH
Output Low Voltage
Output High Voltage
IOL = 1 mA
±0
mV
V
PCI_F, PCI1:±,
REF0:1
IOH = –1 mA
3.1
VOH
IOL
Output High Voltage
Output Low Current:
CPU0:1
IOH = –1 mA
VOL = 1.2±V
VOL = 1.±V
VOL = 1.±V
VOH = 1.2±V
VOH = 1.±V
VOH = 1.±V
2.2
80
70
±0
80
70
±0
V
CPU0:1
120
110
70
180
140
90
mA
mA
mA
mA
mA
mA
PCI_F, PCI1:±
REF0:1
IOH
Output High Current
CPU0:1
120
110
70
180
140
90
PCI_F, PCI1:±
REF0:1
Crystal Oscillator
VTH
X1 Input Threshold Voltage[3]
CLOAD
VDDQ3 = 3.3V
1.6±
14
V
Load Capacitance, As Seen by External Crystal[4]
X1 Input Capacitance[±]
pF
pF
CIN,X1
Pin X2 unconnected
28
Notes:
1. All clock outputs loaded with 6" 60: transmission lines with 20-pF capacitors.
2. CPU_STOP#, PCI_STOP#, PWR_DWN#, SPREAD#, and SEL48# logic inputs have internal pull-up resistors (not CMOS level).
3. X1 input threshold voltage (typical) is V /2.
DD
Rev 1.0,November 24, 2006
Page ± of 8