SL15316
FIN=25MHz Clock, all 5 clocks
are at 66MHz, +/-1.0% Spread.
CL=0, VDD=VDDO=3.3V
Operating Supply Current
Standby Current
IDD
-
-
9.0
70
TBD
100
mA
ISBC
If programmed PD#=GND
μA
For Pins programmed as
SSCLK or REFOUT and if PD#
or OE is programmed.
Output Leakage Current
IOL
-10
-
10
μA
PD#=0 or OE=1
Minimum programming value
Maximum programming value
-
-
7
-
-
pF
pF
PCin
Programmable Input
Capacitance at Pins 3 and 4
PCout
38
Pins programmed as PD#, OE,
SSON or FS
Input Capacitance
Load Capacitance
CIN2
CL
-
-
4
-
6
pF
pF
For all pins programmed as
SSCLK or REFCLK
15
AC Electrical Characteristics (C and I-Grades)
Unless otherwise stated VDD= 3.3V+/- 10% and CL=15pF
Parameter
Symbol
FIN1
Condition
Crystal or Ceramic Resonator
External Clock
Min
8
Typ
Max
48
Unit
MHz
MHz
-
-
Input Frequency Range
Input Frequency Range
Output Frequency Range
Output Frequency Range
Output Frequency Range
Output Duty Cycle
FIN2
3
166
FOUT1 SSCLK
3
0.25
0.25
45
-
-
200
48
166
55
55
60
-
MHz
MHz
MHz
%
FOUT2 REFCLK, crystal or resonator input
FOUT3 REFCLK, clock input
-
DC1
DC2
DCIN
tr/f1
SSCLK
50
50
50
3.8
REFCLK
45
%
Output Duty Cycle
Clock Input, Pin 3
40
%
Input Duty Cycle
Programmable, VDD=3.3V,
CL=15pF, 20 to 80% of VDD
-
ns
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
Output Rise/Fall Time
tr/f2
tr/f3
tr/f4
tr/f5
tr/f6
Programmable, VDD=3.3V,
CL=15pF, 20 to 80% of VDD
-
-
-
-
-
1.9
1.4
-
-
-
-
-
ns
ns
ns
ns
ns
Programmable, VDD=3.3V,
CL=15pF, 20 to 80% of VDD
Programmable, VDD=3.3V,
CL=15pF, 20 to 80% of VDD
1.0
Programmable, VDD=3.3V,
CL=15pF, 20 to 80% of VDD
0.85
0.65
Programmable, VDD=3.3V,
CL=15pF, 20 to 80% of VDD
Rev 1.0, August 7, 2008
Page 6 of 12
SPECTRALINEAR [ SPECTRALINEAR INC ]
