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CY2SSTV16857 参数 Datasheet PDF下载

CY2SSTV16857图片预览
型号: CY2SSTV16857
PDF下载: 下载PDF文件 查看货源
内容描述: 14位Regstered缓冲PC2700- / PC3200兼容 [14-Bit Regstered Buffer PC2700-/PC3200-Compliant]
分类和应用: PC
文件页数/大小: 7 页 / 91 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY2SSTV16857  
Absolute Maximum Conditions[1, 2, 3]  
VSS < (Vin or Vout) < VDD.  
Unused inputs must always be tied to an appropriate logic  
voltage level (either VSS or VDD).  
This device contains circuitry designed to protect the inputs  
against damage due to high static voltages or electric field;  
however, precautions should be taken to avoid application of  
any voltage higher than the maximum rated voltages to this  
circuit. For proper operation, Vin and Vout should be  
constrained to the range:  
Parameter  
VDD  
Description  
Condition  
Non-functional  
Min.  
2.3  
2.3  
0
Max.  
2.7  
Unit  
VDC  
VDC  
VDC  
VDC  
mA  
Supply Voltage[4]  
VDD  
Operating Voltage[4]  
Functional  
2.7  
Vin  
Input Voltage  
Relative to VSS  
Relative to VSS  
VDD  
VDDQ  
50  
Vout  
Output Voltage  
IOUT  
IIK  
DC Output Current  
Continuous Clamp Current  
Continuous Clamp Current  
Continuous current through each VDD or VSS  
Latch Up Immunity  
VI < 0 or VI > VSS  
VO < 0  
50  
mA  
IOK  
–50  
100  
mA  
I
DD/ISS  
mA  
LUI  
RPS  
Ts  
Exceeds spec of  
100  
mA  
Power Supply Ripple  
Ripple Frequency < 100 kHz  
Non-functional  
150  
+150  
+70  
mVp-p  
°C  
Temperature, Storage  
–65  
0
Ta  
Temperature, Operating Ambient  
Temperature, Junction  
Dissipation, Junction to Case  
Dissipation, Junction to Ambient  
Flammability  
Functional  
°C  
Tj  
Functional  
165  
°C  
ØJc  
ØJA  
ULFL  
MSL  
ESDh  
Mil-Spec 883E Method 1012.1  
JEDEC (JESD 51)  
By design and verification  
By design and verification  
22.23  
74.52  
V – 0  
°C/W  
°C/W  
Grade  
Grade  
V
Moisture Sensitivity  
MSL – 1  
2000  
ESD Protection (Human Body Model)  
Table 1. DC Electrical Specifications (VDD = Temperature = 0°C to +85 °C)  
Parameter  
Description  
PC1600,2100,2700  
PC3200  
Condition  
Min.  
Typ.  
Max. Unit  
VDD  
Supply Voltage  
2.5  
2.6  
2.7  
V
V
V
V
VDDQ  
VREF  
VTT  
Output Supply Voltage PC1600,2100,2700  
PC3200  
2.5  
1.25  
2.6  
1.3  
2.7  
Reference voltage  
(VREF = VDDQ/2)  
PC1600,2100,2700  
PC3200  
1.35  
Termination voltage  
VREF –  
40 mV  
VREF VREF+4  
0 mV  
VIH  
VIL  
Input Voltage, High  
Input Voltage, Low  
Output Voltage, Low  
RESET  
RESET  
1.7  
V
V
V
0.7  
0.2  
VOL  
VDD/VDDQ = 2.3V to 2.7V, IOL =  
100 PA, VDD = 2.3 to 2.7V  
V
V
DD/VDDQ = 2.3V, IOL = 16 mA,  
DD = 2.3V  
0.35  
Notes:  
1. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.  
2. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional  
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended period may affect reliability.  
3. All terminals except V  
terminals.  
.
DD  
4. V /V  
DD DDQ  
Rev 1.0,November 21, 2006  
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