欢迎访问ic37.com |
会员登录 免费注册
发布采购

CY28447LFXC 参数 Datasheet PDF下载

CY28447LFXC图片预览
型号: CY28447LFXC
PDF下载: 下载PDF文件 查看货源
内容描述: 时钟发生器Intel㈢ Calistoga的芯片组 [Clock Generator for Intel㈢ Calistoga Chipset]
分类和应用: 晶体时钟发生器外围集成电路
文件页数/大小: 21 页 / 203 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
 浏览型号CY28447LFXC的Datasheet PDF文件第5页浏览型号CY28447LFXC的Datasheet PDF文件第6页浏览型号CY28447LFXC的Datasheet PDF文件第7页浏览型号CY28447LFXC的Datasheet PDF文件第8页浏览型号CY28447LFXC的Datasheet PDF文件第10页浏览型号CY28447LFXC的Datasheet PDF文件第11页浏览型号CY28447LFXC的Datasheet PDF文件第12页浏览型号CY28447LFXC的Datasheet PDF文件第13页  
CY28447  
Byte 12: Control Register 12  
Bit  
@Pup  
Name  
CLKREQ#9  
Description  
7
6
5
4
3
2
1
0
0
CLKREQ#9 Input Enable  
0 = Disable 1 = Enable  
0
0
0
0
0
0
0
CLKREQ#8  
CLKREQ#7  
CLKREQ#6  
CLKREQ#5  
CLKREQ#4  
CLKREQ#3  
CLKREQ#2  
CLKREQ#8 Input Enable  
0 = Disable 1 = Enable  
CLKREQ#7 Input Enable  
0 = Disable 1 = Enable  
CLKREQ#6 Input Enable  
0 = Disable 1 = Enable  
CLKREQ#5 Input Enable  
0 = Disable 1 = Enable  
CLKREQ#4 Input Enable  
0 = Disable 1 = Enable  
CLKREQ#3 Input Enable  
0 = Disable 1 = Enable  
CLKREQ#2 Input Enable  
0 = Disable 1 = Enable  
Byte 13: Control Register 13  
Bit  
@Pup  
Name  
Description  
7
6
0
CLKREQ#1  
CLKREQ#1 Input Enable  
0 = Disable 1 = Enable  
1
LCD 96_100M Clock  
Speed  
LCD 96_100M Clock Speed  
0 = 96 MHz 1 = 100 MHz  
5
4
3
1
1
1
RESERVED  
RESERVED  
PCI4  
RESERVED, Set = 1  
RESERVED, Set = 1  
PCI4 (Spread and Non-spread) Output Drive Strength  
0 = Low, 1 = High  
2
1
0
1
1
1
PCI3  
PCI2  
PCI1  
PCI3 (Spread and Non-spread) Output Drive Strength  
0 = Low, 1 = High  
PCI2 (Spread and Non-spread) Output Drive Strength  
0 = Low, 1 = High  
PCI1 (Spread and Non-spread) Output Drive Strength  
0 = Low, 1 = High  
Table 5. Crystal Recommendations  
Frequency  
Drive  
(max.)  
Shunt Cap Motional  
(max.)  
Tolerance  
(max.)  
Stability  
(max.)  
Aging  
(max.)  
(Fund)  
Cut  
Loading Load Cap  
(max.)  
14.31818 MHz  
AT  
Parallel 20 pF  
0.1 mW  
5 pF  
0.016 pF  
35 ppm  
30 ppm  
5 ppm  
The CY28447 requires a Parallel Resonance Crystal. Substi-  
tuting a series resonance crystal will cause the CY28447 to  
operate at the wrong frequency and violate the ppm specifi-  
cation. For most applications there is a 300-ppm frequency  
shift between series and parallel crystals due to incorrect  
loading.  
the crystal will see must be considered to calculate the appro-  
priate capacitive loading (CL).  
Figure 1 shows a typical crystal configuration using the two  
trim capacitors. An important clarification for the following  
discussion is that the trim capacitors are in series with the  
crystal not parallel. It’s a common misconception that load  
capacitors are in parallel with the crystal and should be  
approximately equal to the load capacitance of the crystal.  
This is not true.  
Crystal Loading  
Crystal loading plays a critical role in achieving low ppm perfor-  
mance. To realize low ppm performance, the total capacitance  
Rev 1.0,November 20, 2006  
Page 9 of 21