CY28447
Byte 9: Control Register 9
Bit
@Pup
Name
RESERVED
RESERVED
S1
Description
7
6
5
4
0
0
0
0
RESERVED
RESERVED
27M_SS / LCD 96_100M SS Spread Spectrum Selection table:
S[1:0] SS%
‘00’ = –0.5%(Default value)
‘01’ = –1.0%
‘10’ = –1.5%
S0
‘11’ = –2.0%
3
2
1
1
RESERVED
27M_SS
RESERVED, Set = 1
27M Spread Output Enable
0 = Disable (Tri-state), 1 = Enabled
1
0
1
0
27M_SS Spread Enable
RESERVED
27M_SS Spread spectrum enable.
0 = Disable, 1 = Enable.
RESERVED set = 0
Byte 10: Control Register 10
Bit
@Pup
Name
Description
RESERVED, Set = 1
7
6
5
1
1
1
RESERVED
RESERVED
SRC[T/C]9
RESERVED, Set = 1
SRC[T/C]9 Output Enable
0 = Disable (Hi-Z), 1 = Enable
4
1
SRC[T/C]8
SRC[T/C]8 Output Enable
0 = Disable (Hi-Z), 1 = Enable
3
2
0
0
RESERVED
SRC[T/C]10
RESERVED, Set = 0
Allow control of SRC[T/C]10 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
1
0
0
0
SRC[T/C]9
SRC[T/C]8
Allow control of SRC[T/C]9 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Allow control of SRC[T/C]8 with assertion of SW PCI_STP#
0 = Free running, 1 = Stopped with PCI_STP#
Byte 11: Control Register 11
Bit
@Pup
0
Name
RESERVED
Description
7
6
5
4
3
RESERVED
RESERVED
RESERVED
RESERVED
HW
HW
HW
0
RESERVED
RESERVED
RESERVED
27M_SS / 27M_NSS
27-MHz (spread and non-spread) Output Drive Strength
0 = Low, 1 = High
2
1
0
0
0
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED Set = 0
RESERVED
HW
Rev 1.0,November 20, 2006
Page 8 of 21
SPECTRALINEAR [ SPECTRALINEAR INC ]
