CY28419
Byte 0: Control Register 0
Bit
7
@Pup
Name
Description
0
1
0
0
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
6
5
4
3
2
1
Externally FS_B
Selected
FS_B reflects the value of the FS_B pin sampled on power-up.
0 = FS_B low at power-up
0
Externally FS_A
Selected
FS_A reflects the value of the FS_A pin sampled on power-up.
0 = FS_A low at power-up
Byte 1: Control Register 1
Bit
@Pup
Name
SRCT, SRCC
Description
7
0
Allow control of SRCT/C with assertion of PCI_STP#
0 = Free Running, 1 = Stopped with PCI_STP#
6
1
SRCT, SRCC
SRCT/C Output Enable
0 = Disabled (three-state), 1 = Enabled
5
4
3
2
1
1
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
CPUT2, CPUC2
CPUT/C2 Output Enable
0 = Disabled (three-state), 1 = Enabled
1
0
1
1
CPUT1, CPUC1
CPUT0, CPUC0
CPUT/C1 Output Enable,
0 = Disabled (three-state), 1 = Enabled
CPUT/C0 Output Enable
0 = Disabled (three-state), 1 = Enabled
Byte 2: Control Register 2
Bit
@Pup
Name
SRCT, SRCC
Description
7
0
SRCT/C Pwrdwn drive mode
0 = Driven in power-down, 1 = Three-state in power-down
6
5
4
3
0
0
0
0
SRCT, SRCC
SRCT/C Stop drive mode
0 = Driven in PCI_STP, 1 = Three-state in power-down
CPUT2, CPUC2
CPUT1, CPUC1
CPUT0, CPUC0
CPUT/C2 Pwrdwn drive mode
0 = Driven in power-down, 1 = Three-state in power-down
CPUT/C1 Pwrdwn drive mode
0 = Driven in power-down, 1 = Three-state in power-down
CPUT/C0 Pwrdwn drive mode
0 = Driven in power-down, 1 = Three-state in power-down
2
1
0
0
0
0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Rev 1.0,November 22, 2006
Page 5 of 15
SPECTRALINEAR [ SPECTRALINEAR INC ]
