欢迎访问ic37.com |
会员登录 免费注册
发布采购

CY28416OXCT 参数 Datasheet PDF下载

CY28416OXCT图片预览
型号: CY28416OXCT
PDF下载: 下载PDF文件 查看货源
内容描述: 下一代FTG的英特尔®架构 [Next Generation FTG for Intel㈢ Architecture]
分类和应用: 晶体外围集成电路光电二极管时钟
文件页数/大小: 14 页 / 191 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
 浏览型号CY28416OXCT的Datasheet PDF文件第3页浏览型号CY28416OXCT的Datasheet PDF文件第4页浏览型号CY28416OXCT的Datasheet PDF文件第5页浏览型号CY28416OXCT的Datasheet PDF文件第6页浏览型号CY28416OXCT的Datasheet PDF文件第8页浏览型号CY28416OXCT的Datasheet PDF文件第9页浏览型号CY28416OXCT的Datasheet PDF文件第10页浏览型号CY28416OXCT的Datasheet PDF文件第11页  
CY28416  
Byte 7: Vendor ID  
Bit @Pup  
Name  
Revision Code Bit 3  
Revision Code Bit 2  
Revision Code Bit 1  
Revision Code Bit 0  
Vendor ID Bit 3  
Description  
7
6
5
4
3
2
1
0
0
0
0
1
1
0
0
0
Revision Code Bit 3  
Revision Code Bit 2  
Revision Code Bit 1  
Revision Code Bit 0  
Vendor ID Bit 3  
Vendor ID Bit 2  
Vendor ID Bit 2  
Vendor ID Bit 1  
Vendor ID Bit 1  
Vendor ID Bit 0  
Vendor ID Bit 0  
Table 5. Crystal Recommendations  
Frequency  
Drive  
(max.)  
Shunt Cap Motional  
(max.)  
Tolerance  
(max.)  
Stability  
(max.)  
Aging  
(max.)  
(Fund)  
Cut  
Loading Load Cap  
(max.)  
14.31818 MHz  
AT  
Parallel 20 pF  
0.1 mW  
5 pF  
0.016 pF  
50 ppm  
50 ppm  
5 ppm  
(CL). While the capacitance on each side of the crystal is in  
series with the crystal, trim capacitors (Ce1,Ce2) should be  
calculated to provide equal capacitive loading on both sides.  
Crystal Recommendations  
The CY28416 requires a Parallel Resonance Crystal.  
Substituting a series resonance crystal will cause the  
CY28416 to operate at the wrong frequency and violate the  
ppm specification. For most applications there is a 300-ppm  
frequency shift between series and parallel crystals due to  
incorrect loading.  
Clock Chip  
Ci2  
Ci1  
Pin  
3 to 6p  
Crystal Loading  
Crystal loading plays a critical role in achieving low ppm perfor-  
mance. To realize low ppm performance, the total capacitance  
the crystal will see must be considered to calculate the appro-  
priate capacitive loading (CL).  
X2  
X1  
Cs2  
Cs1  
Figure 1 shows a typical crystal configuration using the two  
trim capacitors. An important clarification for the following  
discussion is that the trim capacitors are in series with the  
crystal, not parallel. It’s a common misconception that load  
capacitors are in parallel with the crystal and should be  
approximately equal to the load capacitance of the crystal.  
Trace  
2.8pF  
XTAL  
Ce1  
Ce2  
Trim  
33pF  
This is not true.  
.
Figure 2. Crystal Loading Example  
Use the following formulas to calculate the trim capacitor  
values for Ce1 and Ce2.  
Load Capacitance (each side)  
Ce = 2 * CL – (Cs + Ci)  
Total Capacitance (as seen by the crystal)  
1
CLe  
=
1
Ce2 + Cs2 + Ci2  
1
Ce1 + Cs1 + Ci1  
(
)
+
Figure 1. Crystal Capacitive Clarification  
CL....................................................Crystal load capacitance  
Calculating Load Capacitors  
CLe......................................... Actual loading seen by crystal  
using standard value trim capacitors  
In addition to the standard external trim capacitors, trace  
capacitance and pin capacitance must also be considered to  
correctly calculate crystal loading. As mentioned previously,  
the capacitance on each side of the crystal is in series with the  
crystal. This means the total capacitance on each side of the  
crystal must be twice the specified crystal load capacitance  
Ce..................................................... External trim capacitors  
Cs..............................................Stray capacitance (terraced)  
Ci ...........................................................Internal capacitance  
(lead frame, bond wires etc.)  
Rev 1.0,November 22, 2006  
Page 7 of 14