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CY28354OXC-400T 参数 Datasheet PDF下载

CY28354OXC-400T图片预览
型号: CY28354OXC-400T
PDF下载: 下载PDF文件 查看货源
内容描述: 210 MHz的24输出缓冲器,用于4 DDR DIMM为VIA芯片组支持 [210 MHz 24 Output Buffer for 4-DDR DIMMS for VIA Chipsets Support]
分类和应用: 逻辑集成电路光电二极管驱动双倍数据速率
文件页数/大小: 8 页 / 169 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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CY28354-400  
Table 2. Block Read and Block Write Protocol  
Block Write Protocol  
Block Read Protocol  
Description  
Bit  
1
Description  
Bit  
1
Start  
Start  
2:8  
9
Slave address – 7 bits  
Write = 0  
2:8  
9
Slave address – 7 bits  
Write = 0  
10  
Acknowledge from slave  
10  
Acknowledge from slave  
11:18  
Command Code – 8 bits  
'00000000' stands for block operation  
11:18  
Command Code – 8 bits  
'00000000' stands for block operation  
19  
20:27  
28  
Acknowledge from slave  
Byte Count from master – 8 bits  
Acknowledge from slave  
Data byte 0 from master – 8 bits  
Acknowledge from slave  
Data byte 1 from master – 8 bits  
Acknowledge from slave  
Data bytes from master/Acknowledge  
Data Byte N – 8 bits  
19  
20  
Acknowledge from slave  
Repeat start  
21:27  
28  
Slave address – 7 bits  
Read = 1  
29:36  
37  
29  
Acknowledge from slave  
Byte count from slave – 8 bits  
Acknowledge  
38:45  
46  
30:37  
38  
....  
39:46  
47  
Data byte 0 from slave – 8 bits  
Acknowledge  
....  
....  
Acknowledge from slave  
Stop  
48:55  
56  
Data byte 1 from slave – 8 bits  
Acknowledge  
....  
....  
Data bytes from slave/Acknowledge  
Data byte N from slave – 8 bits  
Not Acknowledge  
....  
....  
....  
Stop  
• Reserved and unused bits should be programmed to “0”  
• SMBus Address for the CY28354 is as follows.  
Serial Configuration Map  
• TheSerialbitswillbereadbytheclockdriverinthefollowing  
order.  
A6 A5 A4 A3 A2 A1 A0 R/W  
Byte 0 – Bits 7, 6, 5, 4, 3, 2, 1, 0  
Byte 1 – Bits 7, 6, 5, 4, 3, 2, 1, 0  
Byte N – Bits 7, 6, 5, 4, 3, 2, 1, 0  
SEL ADDR = 1  
SEL ADDR = 0  
1
1
1
1
0
0
1
1
0
1
0
1
1
0
Rev 1.0,November 22, 2006  
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