CY28325-3
Pin Definitions
Pin Name
No.
Type
Description
X1
4
I
Crystal Connection or External Reference Frequency Input: This pin
has dual functions. It can be used as an external 14.318-MHz crystal con-
nection or as an external reference frequency input.
X2
5
1
O
Crystal Connection: Connection for an external 14.318-MHz crystal. If
using an external reference, this pin must be left unconnected.
REF/FS4
I/O
Reference Clock Output/Frequency Select 4: 3.3V 14.318-MHz output.
This pin also serves as a power-on strap option to determine device oper-
ating frequency as described in the Frequency Selection Table.
CPUT_0:1
CPUC_0:1
CPUT_CS_F
CPUC_CS_F
APIC0:1
40, 39, 35, 34
42, 41
O
O
O
CPU Clock Outputs: Frequency is set by the FS0:4 inputs or through
serial input interface.
CPU Clock Outputs for Chipset: Frequency is set by the FS0:4 inputs or
through serial input interface.
46, 45
APIC Clock Output: APIC clock outputs running at half of PCI output
frequency.
AGP 0:2
23, 26, 27
10
O
AGP Clock Output: 3.3V AGP clock.
PCI_F/FS0
I/O
Free-running PCI Output 1/Frequency Select 1: 3.3V free-running PCI
output. This pin also serves as a power-on strap option to determine
device operating frequency as described in the Frequency Selection Table.
PCI1/FS1
11
12
I/O
I/O
PCI Output 1 /Frequency Select 1: 3.3V PCI output. This pin also serves
as a power-on strap option to determine device operating frequency as
described in the Frequency Selection Table.
PCI2/MULTSEL1
PCI Output 2/Current Multiplier Selection 1: 3.3V PCI output. This pin
also serves as a power-on strap option to determine the current multiplier
for the CPU clock outputs. The MULTSEL definitions are as follows:
MULTISEL
0 = Ioh is 4 × IREF
1 = Ioh is 6 × IREF
PCI3:8
14, 15, 17, 18,
19, 21
O
PCI Clock Output 3 to 8: 3.3V PCI clock outputs.
48MHz/FS3
7
I/O
48-MHz Output/Frequency Select 3: 3.3V fixed 48-MHz, non-spread
spectrum output. This pin also serves as a power-on strap option to deter-
mine device operating frequency as described in the Frequency Selection
Table.
24_48MHz/FS2
8
I/O
24- or 48-MHz Output/Frequency Select 2: 3.3V fixed 24- or 48-MHz
non-spread spectrum output. This pin also serves as a power-on strap
option to determine device operating frequency as described in the Fre-
quency Selection Table.
CPU_STOP#
32
I
CPU Output Control: 3.3V LVTTL-compatible input that disables
CPUT_CS, CPUC_CS, CPUT_0:1 and CPUC_0:1.
PCI_ST0P#
PD#
31
22
I
I
PCI Output Control: 3.3V LVTTL-compatible input that disables PCI1:8.
Power-down Control: 3.3V LVTTL-compatible input that places the
device in power down mode when held LOW.
SCLK
SDATA
RST#
28
29
30
I
SMBus Clock Input: Clock pin for serial interface.
SMBus Data Input: Data pin for serial interface.
System Reset Output: Open-drain system reset output.
I/O
O
(open-drain)
IREF
37
I
Current Reference for CPU output: A precision resistor is attached to
this pin, which is connected to the internal current reference.
Rev 1.0,November 21, 2006
Page 2 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
