CY2277A
Byte 1: CPU, 24/48 MHz Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Byte 2: PCI Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
23
Description
48/24 MHz (Active/Inactive)
48/24 MHz (Active/Inactive)
(Reserved) drive to ‘0’
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
Description
(Reserved) drive to ‘0’
--
8
22
--
PCICLK_F (Active/Inactive)
PCICLK5 (Active/Inactive)
PCICLK4 (Active/Inactive)
PCICLK3 (Active/Inactive)
PCICLK2 (Active/Inactive)
PCICLK1 (Active/Inactive)
PCICLK0 (Active/Inactive)
16
14
13
12
11
9
N/A
38
39
41
42
Not Used, drive 0
CPUCLK3 (Active/Inactive)
CPUCLK2 (Active/Inactive)
CPUCLK1 (Active/Inactive)
CPUCLK0 (Active/Inactive)
Byte 3: SDRAM Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Byte 4: SDRAM Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Bit Pin #
Bit 7 26
Bit 6 27
Bit 5 29
Bit 4 30
Bit 3 32
Bit 2 33
Bit 1 35
Bit 0 36
Description
SDRAM7 (Active/Inactive)
SDRAM6 (Active/Inactive)
SDRAM5 (Active/Inactive)
SDRAM4 (Active/Inactive)
SDRAM3 (Active/Inactive)
SDRAM2 (Active/Inactive)
SDRAM1 (Active/Inactive)
SDRAM0 (Active/Inactive)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
N/A
Description
Not used, drive to ‘0’
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Not used, drive to ‘0’
Not used, drive to ‘0’
Not used, drive to ‘0’
Not used, drive to ‘0’
Not used, drive to ‘0’
Not used, drive to ‘0’
Not used, drive to ‘0’
Byte 5: Peripheral Active/Inactive
Register (1 = Active, 0 = Inactive), Default = Active
Byte 6: Reserved, for future use
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
Description
(Reserved) drive to ‘0’
(Reserved) drive to ‘0’
(Reserved) drive to ‘0’
IOAPIC (Active/Inactive)
(Reserved) drive to ‘0’
(Reserved) drive to ‘0’
REF1 (Active/Inactive)
REF0 (Active/Inactive)
--
--
--
45
--
--
1
2
Rev 1.0,November 25, 2006
Page 5 of 18