CY2210
Function Table[2]
CPUCLK CPUCLK/2 AGPCLK
(MHz) (MHz) (MHz)
PCICLK
(MHz)
USBCLK
(MHz)
REFCLK
(MHz)
APICCLK
(MHz)
SEL133
SEL1
SEL0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Hi-Z Hi-Z Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
100.227[3]
50.114[3]
66.818[3]
66.67
66.67
TCLK/4
N/A
33.409[3]
33.33
33.33
TCLK/8
N/A
48.008[3]
OFF
48
14.318[3]
14.318
14.318
TCLK
16.705[3]
16.67
16.67
TCLK/16
N/A
100
50
100
50
TCLK/2
N/A
TCLK/4
N/A
TCLK/2
N/A
N/A
133.33
133.33
66.67
66.67
66.67
66.67
33.33
33.33
OFF
48
14.318
14.318
16.67
16.67
Actual Clock Frequency Values
Target
Frequency
(MHz)
Actual
Frequency
(MHz)
PPM
-3
Clock
Output
CPUCLK
CPUCLK
USBCLK
-2
-3
-4
-2
-3
-4
-2
-4
100.0
133.33
48.0
100.0
133.33
48.0
100.0
133.33
48.0
99.126
132.769
48.008
99.126
132.769
48.008
100.227
132.769
48.008
–8740
–8740
–4208
167
+2714
–4208
167
–4208
167
Clock Enable Configuration
REF
PCI_F APIC
CPU_STOP PWR_DWN PCI_STOP
CPUCLK
CPUCLK/2
AGP
PCI
LOW
LOW
ON
OSC.
OFF
ON
VCOs
OFF
ON
X
0
0
1
1
0
1
1
1
1
X
0
1
0
1
LOW
LOW
LOW
ON
LOW
ON
LOW
LOW
LOW
ON
LOW
ON
LOW
ON
ON
ON
ON
ON
ON
ON
LOW
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
ON
Clock Driver Impedances
Impedance
Minimum
:
Typical
:
Maximum
:
Buffer Name
CPU, CPU/2, APIC
USB, REF
V
DD Range
Buffer Type
Type 1
2.375–2.625
3.135–3.465
3.135–3.465
13.5
20
29
40
30
45
60
55
Type 3
PCI, AGP
Type 5
12
Notes:
2. TCLK is a test clock driven in on the XTALIN input in test mode.
3. Only CY2210-2 supports this option. In CY2210-3, this selection is defined as “N/A” or “Reserved”.
Rev 1.0,November 25, 2006
Page 3 of 10
SPECTRALINEAR [ SPECTRALINEAR INC ]
