STK10C68-M
NONVOLATILE MEMORY OPERATION
MODE SELECTION
E
W
G
NE
MODE
POWER
H
L
L
L
L
L
L
X
H
L
X
L
X
H
H
L
Not Selected
Read RAM
Standby
Active
Active
Active
I
X
L
Write RAM
n
H
L
Nonvolatile RECALL
Nonvolatile STORE
No operation
H
L
L
CC
2
L
L
Active
H
H
X
STORE CYCLES #1 & #2
(VCC = 5.0V ± 10%)
SYMBOLS
NO.
PARAMETER
MIN
MAX
UNITS
#1
#2
Alt.
p
q
22
23
24
25
26
27
28
t
t
t
t
t
STORE Cycle Time
12
ms
ns
ns
ns
ns
ns
ns
WLQX
ELQXS
ELNHS
STORE
t
STORE Initiation Cycle Time
Output Disable Set-up to NE Fall
Output Disable Set-up to E Fall
NE Set-up
35
0
WLNH
WC
t
GHNL
t
t
0
GHEL
t
t
0
NLWL
NLEL
t
Chip Enable Set-up
0
ELWL
Write Enable Set-up
0
WLEL
Note n: An automatic RECALL also takes place at power up, starting when V exceeds 4.0V, and taking t
from the time at which V exceeds 4.5V.
CC
CC
RECALL
V
must not drop below 4.0V once it has been exceeded for the RECALL to function properly.
CC
Note o: If E is low for any period of time in which W is high and G and NE are low, then a RECALL cycle may be initiated.
Note p: Measured with W and NE both returned high, and G returned low. Note that STORE cycles are inhibited/aborted by V < 4.0V (STORE inhibit).
CC
Note q: Once t
has been satisfied by NE, G, W and E, the STORE cycle is completed automatically. Any of NE, G, W or E may be used to terminate the
WC
STORE initiation cycle.
o
STORE CYCLE #1: W CONTROLLED
NE
G
24
GHNL
26
NLWL
23
t
t
t
WLNH
W
27
ELWL
t
E
22
WLQX
t
HIGH IMPEDANCE
DQ (Data Out)
o
STORE CYCLE #2: E CONTROLLED
26
t
NLEL
NE
25
GHEL
t
G
28
WLEL
t
W
23
ELNHS
t
E
22
ELQXS
t
HIGH IMPEDANCE
DQ (Data Out)
4-16