欢迎访问ic37.com |
会员登录 免费注册
发布采购

500DBAD200M000ACFR 参数 Datasheet PDF下载

500DBAD200M000ACFR图片预览
型号: 500DBAD200M000ACFR
PDF下载: 下载PDF文件 查看货源
内容描述: [LVPECL Output Clock Oscillator, 0.9MHz Min, 200MHz Max, 200MHz Nom]
分类和应用: 振荡器
文件页数/大小: 6 页 / 72 K
品牌: SILICON [ SILICON ]
 浏览型号500DBAD200M000ACFR的Datasheet PDF文件第1页浏览型号500DBAD200M000ACFR的Datasheet PDF文件第2页浏览型号500DBAD200M000ACFR的Datasheet PDF文件第3页浏览型号500DBAD200M000ACFR的Datasheet PDF文件第5页浏览型号500DBAD200M000ACFR的Datasheet PDF文件第6页  
Si500D  
Environmental Compliance  
Parameter  
Conditions/Test Method  
MIL-STD-883, Method 2002.4  
MIL-STD-883, Method 2007.3 A  
MIL-STD-202, 260 C° for 8 seconds  
MIL-STD-883, Method 2003.8  
IEC 68-2-3  
Mechanical Shock  
Mechanical Vibration  
Resistance to Soldering Heat  
Solderability  
Damp Heat  
Moisture Sensitivity Level  
J-STD-020, MSL 3  
Ordering Information  
The Si500D supports a variety of options including frequency, output format, supply voltage, and tri-  
state/powerdown. Specific device configurations are programmed into the Si500D at time of shipment.  
Configurations are specified using the figure below. Silicon Labs provides a web-based part number utility that can  
be used to simplify part number configuration. Refer to www.silabs.com/SiliconXOPartnumber to access this tool.  
The Si500D XO series is supplied in a ROHS-compliant, Pb-free, 6-pad, 3.2 x 4.0 mm package. Tape and reel  
packaging is available as an ordering option.  
500D  
X
X
X
XXMXXXX  
A
C
X
R
Frequency  
Si500  
Differential  
Oscillator  
R = Tape & Reel  
Blank = Cut-Tape  
xMxxxxx: fOUT < 10 MHz  
xxMxxxx: 10 MHz < fOUT < 100 MHz  
xxxMxxx: fOUT > 100 MHz  
1st Option Code  
VDD Format  
LVPECL  
3rd Option Code  
Oper. Temp Range  
A
B
C
D
E
F
G
H
J
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
2.5  
1.8  
1.8  
1.8  
1.8  
1.8  
1.8  
Tri-State/Powerdown/  
Output Driver Stopped  
F
H
0 to 70 °C  
0 to 85 °C  
Low Power LVPECL  
LVDS  
HCSL  
Dual Output CMOS  
Differential CMOS  
Dual Output SSTL  
Differential SSTL  
LVPECL  
Low Power LVPECL  
LVDS  
HCSL  
Dual Output CMOS  
Differential CMOS  
Dual Output SSTL  
Differential SSTL  
LVDS  
A
B
C
D
E
F
OE active high/tristate  
OE active low/tristate  
OE active high/powerdown  
OE active low/powerdown  
OE active high/driver stopped  
OE active low/driver stopped  
Product Revision = C  
K
L
2nd Option Code  
Package  
Stability (ppm, max)  
M
N
P
Q
R
S
T
U
V
W
X
A
3.2 x 4.0 mm SMD  
A
B
±150  
±250  
HCSL  
Dual Output CMOS  
Differential CMOS  
Dual Output SSTL  
Differential SSTL  
4
Rev. 1.0