E0C88862
● Recommended Operating Conditions
(VSS=0V, Ta=-40 to 85°C)
Condition
Operating power voltage
(Normal mode)
Symbol
VDD
Remark
Min.
2.4
Typ.
Max.
5.5
Unit Note
V
Operating power voltage
(Low power mode)
Operating power voltage
(High speed mode)
VDD
VDD
1.8
3.5
3.5
5.5
V
V
Operating frequency
(Normal mode)
Operating frequency
fOSC1 VDD = 2.4 to 5.5V
fOSC3
fOSC1 VDD = 1.8 to 3.5V
30.000 32.768 80.000
0.03 4.2
30.000 32.768 80.000
kHz
MHz
kHz
1
1
1
(Low power mode)
Operating frequency
(High speed mode)
fOSC1 VDD = 3.5 to 5.5V
fOSC3
30.000 32.768 80.000
kHz
MHz
V
1
1
2
0.03
8.2
6.0
Liquid crystal power voltage
Capacitor between VD1 and VSS
Capacitor between VC1 and VSS
Capacitor between VC2 and VSS
Capacitor between VC3 and VSS
Capacitor between VC4 and VSS
Capacitor between VC5 and VSS
Capacitor between CA and CB
Capacitor between CA and CC
Capacitor between CD and CE
Capacitor between CF and CG
VC5
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
VC5 ≥ VC4 ≥ VC3 ≥ VC2 ≥ VC1 ≥ VSS
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
µF
µF
µF
µF
µF
µF
µF
µF
µF
µF
3
3
3, 4
3
3
3
3
3, 4
3
Note) 1 When an external clock is input from the OSC1 terminal by the mask option, leave the OSC2 terminal open,
and when an external clock is input from the OSC3 terminal, leave the OSC4 terminal open.
2 When external power supply is selected by the mask option.
3 When LCD drive power is not used, the capacitor is not necessary. In this case, leave the VC1 to VC5 and CA to CG terminals open.
4 When a 1/4-bias LCD drive power supply is used, the capacitors C4 and C9 are not necessary.
● DC Characteristics
(Unless otherwise specified: VDD=1.8 to 5.5V, VSS=0V, Ta=-40 to 85°C)
Characteristic
High level input voltage (1)
Low level input voltage (1)
High level input voltage (2)
(Normal mode)
High level input voltage (2)
(Low power mode)
High level input voltage (2)
(High speed mode)
Low level input voltage (2)
(Normal mode)
Low level input voltage (2)
(Low power mode)
Low level input voltage (2)
(High speed mode)
Symbol
Condition
Min.
0.8VDD
0
Typ.
Max.
Unit Note
V
V
V
IH1
IL1
IH2
Kxx, Pxx
Kxx, Pxx
OSC1
V
DD
V
V
0.2VDD
1.6
V
V
V
DD
DD
DD
V
V
V
V
V
V
1
1
1
1
1
1
V
V
V
V
V
IH2
IH2
IL2
IL2
IL2
OSC1
OSC1
OSC1
OSC1
OSC1
1.0
2.4
0
0.6
0.3
0.9
0
0
High level schmitt input voltage
Low level schmitt input voltage
High level output current
Low level output current
Input leak current
V
V
T+
T-
RESET
RESET
Pxx, Rxx, VOH = 0.9VDD
Pxx, Rxx, VOL = 0.1VDD
Kxx, Pxx, RESET
Pxx, Rxx
Kxx, Pxx, RESET
Kxx, Pxx, VIN = 0V, f = 1MHz, Ta = 25°C
0.5VDD
0.1VDD
0.9VDD
0.5VDD
-0.5
V
V
I
I
I
I
OH
mA
mA
µA
µA
kΩ
pF
µA
µA
OL
0.5
-1
-1
LI
1
1
500
15
-5
Output leak current
LO
Input pull-up resistance
Input terminal capacitance
Segment/Common output current
R
C
IN
IN
100
300
7
2
I
I
SEGH SEGxx, COMxx, VSEGH = VC5-0.1V
SEGL SEGxx, COMxx, VSEGL = 0.1V
5
Note) 1 When external clock is selected by mask option.
2 When pull-up resistor is added by mask option.
5
SEIKO [ SEIKO EPSON CORPORATION ]
