E0C88112
● SVD Circuit
(Unless otherwise specified: VDD = 1.8 to 5.5V, VSS = 0V, Ta = 25°C)
Characteristic
Symbol
Condition
Min.
Typ.
1.82
2.00
2.18
2.36
Max.
Unit Note
SVD voltage
VSVD Level 1 → Level 0
Level 2 → Level 1
Level 3 → Level 2
Level 4 → Level 3
Level 5 → Level 4
Level 6 → Level 5
Level 7 → Level 6
Level 8 → Level 7
Level 9 → Level 8
Level 10 → Level 9
Level 11 → Level 10
Level 12 → Level 11
Level 13 → Level 12
Level 14 → Level 13
Level 15 → Level 14
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Typ×0.92 2.54 Typ×1.08
2.72
2.90
3.08
3.26
3.45
3.65
3.85
4.05
4.25
4.50
Typ×0.88
Typ×1.12
● Analog Comparator Circuit
(Unless otherwise specified: VDD = 1.8 to 5.5V, VSS = 0V, Ta = 25°C)
Characteristic
Analog comparator
operating voltage input range
Analog comparator offset voltage
Symbol
Condition
CMIP Non-inverted input (CMPP)
CMIM Inverted input (CMPM)
Min.
0.7
0.7
Typ.
Max.
DD - 0.7
DD - 0.7
20
Unit Note
V
V
V
V
V
V
V
6
6
6
CMOF
V
V
CMIP = 0.7V to VDD - 0.7V
CMIM = 0.7V to VDD - 0.7V
mV
Analog comparator stability time
Analog comparator response time
tCMP1
tCMP2
1
2
mS
mS
7
6
8
V
V
V
CMIP = 0.7V to VDD - 0.7V
CMIM = 0.7V to VDD - 0.7V
CMIP = VCMIM ± 0.025V
Note) 6 When "without pull-up resistor" (comparator input terminal) is selected by mask option.
7 Stability time is the time from turning the circuit ON until the circuit is stabilized.
8 Response time is the time that the output result responds to the input signal.
● Current Consumption
(Unless otherwise specified: VDD = Within the operating voltage in each operating mode, VSS = 0V, Ta = 25°C,
OSC1 = 32.768kHz crystal oscillation, C
G
= 10pF, OSC3 = External clock input, Non heavy load protection mode, C1 = 0.1µF)
Characteristic Symbol
Condition
Min.
Typ.
Max.
Unit Note
1
2
3
4
Power current
(Normal mode)
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
DD1
DD2
DD3
DD4
HVL
DD1
DD2
DD3
HVL
DD1
DD2
DD3
DD4
HVL
SVDN
In SLEEP status
In HALT status
CPU is in operating (32.768kHz)
CPU is in operating (1MHz)
In heavy load protection mode
In SLEEP status
*
*
*
*
0.3
2
1
5
18
0.60
50
1
µA
µA
µA
mA
14
0.45
25
0.2
1
8
15
1
µA
µA
µA
µA
µA
µA
µA
µA
mA
µA
µA
µA
µA
µA
µA
9
9
1
2
3
Power current
(Low power mode)
*
*
*
In HALT status
5
CPU is in operating (32.768kHz)
In heavy load protection mode
In SLEEP status
12
30
3
1
2
3
4
Power current
(High speed mode)
*
*
*
*
In HALT status
5
10
30
1.00
70
60
75
100
10
50
CPU is in operating (32.768kHz)
CPU is in operating (1MHz)
In heavy load protection mode
24
0.70
35
30
25
40
4
9
10
9
SVD circuit current
VDD = 3.0V
SVDH In heavy load protection mode
CMP1 CMPXDT = "1"
CMP2 CMPXDT = "0"
Analog comparator circuit current
OSC1 CR oscillation current
CR1
20
11
1
2
3
4
OSC1: Stop,
OSC1: Oscillating, OSC3: Stop,
OSC1: Oscillating, OSC3: Stop,
OSC3: Stop,
CPU, ROM, RAM: SLEEP status,
CPU, ROM, RAM: HALT status,
Clock timer: Stop,
Clock timer: Operating, Others: Stop status
Others: Stop status
CPU, ROM, RAM: Operating in 32.768kHz, Clock timer: Operating, Others: Stop status
Clock timer: Operating, Others: Stop status
It is the value of current which flows in the heavy load protection circuit when in the heavy load protection mode (OSC3 ON or buzzer ON).
10 The value in x V can be found by the following expression:
SVDN (VDD = x V) = (x × 20) - 30 (Typ. value), ISVDN (VDD = x V) = (x × 30) - 30 (Max. value
11 When OSC1 CR oscillation circuit is selected by the mask option.
OSC1: Oscillating, OSC3: Oscillating, CPU, ROM, RAM: Operating in 1MHz,
9
Note)
I
)
5
SEIKO [ SEIKO EPSON CORPORATION ]
