欢迎访问ic37.com |
会员登录 免费注册
发布采购

E0C6SL32F 参数 Datasheet PDF下载

E0C6SL32F图片预览
型号: E0C6SL32F
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 0.032768MHz, MICROCONTROLLER, PQFP80, PLASTIC, QFP-80]
分类和应用: 时钟外围集成电路
文件页数/大小: 12 页 / 123 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
 浏览型号E0C6SL32F的Datasheet PDF文件第4页浏览型号E0C6SL32F的Datasheet PDF文件第5页浏览型号E0C6SL32F的Datasheet PDF文件第6页浏览型号E0C6SL32F的Datasheet PDF文件第7页浏览型号E0C6SL32F的Datasheet PDF文件第9页浏览型号E0C6SL32F的Datasheet PDF文件第10页浏览型号E0C6SL32F的Datasheet PDF文件第11页浏览型号E0C6SL32F的Datasheet PDF文件第12页  
E0C6S32  
E0C6SA32 (Normal Mode)  
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)  
Characteristic  
Internal voltage  
Symbol  
Condition  
Min.  
-1.15  
Typ.  
-1.05  
Max.  
-0.95  
Unit  
V
V
V
V
V
L1  
Connect 1Mload resistor between VDD and VL1  
(without panel load)  
Connect 1Mload resistor between VDD and VL2  
(without panel load)  
Connect 1Mload resistor between VDD and VL3  
(without panel load)  
L2  
2•VL1  
-0.1  
3•VL1  
-0.1  
2•VL1  
×0.9  
3•VL1  
×0.9  
-2.25  
100  
V
V
L3  
SVD voltage  
SVD  
-2.55  
-2.40  
V
µS  
V
SVD circuit response time  
Analog comparator  
input voltage  
Analog comparator  
offset voltage  
t
SVD  
V
V
V
IP  
Noninverted input (AMPP)  
Inverted input (AMPM)  
V
SS+0.3  
VDD-0.9  
IM  
OF  
10  
mV  
mS  
Analog comparator  
response time  
t
AMP  
V
IP=-1.5V, VIM=VIP±15mV  
3
Current consumption  
I
OP  
During HALT  
During operation *1  
During operation at 1MHz *1  
Without panel load  
OSCC="0"  
Without panel load  
1.5  
4.0  
150  
3.0  
8.0  
300  
µA  
µA  
µA  
1: The SVD circuit and analog comparator are in the OFF status.  
E0C6SA32 (Heavy Load Protection Mode)  
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)  
Characteristic  
Internal voltage  
Symbol  
Condition  
Min.  
-1.15  
Typ.  
-1.05  
Max.  
-0.95  
Unit  
V
V
V
V
V
L1  
Connect 1Mload resistor between VDD and VL1  
(without panel load)  
Connect 1Mload resistor between VDD and VL2  
(without panel load)  
Connect 1Mload resistor between VDD and VL3  
(without panel load)  
L2  
2•VL1  
-0.1  
3•VL1  
-0.1  
2•VL1  
×0.9  
3•VL1  
×0.9  
-2.25  
100  
V
V
L3  
SVD voltage  
SVD  
-2.55  
-2.40  
V
µS  
V
SVD circuit response time  
Analog comparator  
input voltage  
Analog comparator  
offset voltage  
t
SVD  
V
V
V
IP  
Noninverted input (AMPP)  
Inverted input (AMPM)  
V
SS+0.3  
VDD-0.9  
IM  
OF  
10  
mV  
mS  
Analog comparator  
response time  
t
AMP  
V
IP=-1.5V, VIM=VIP±15mV  
3
Current consumption  
I
OP  
During HALT  
During operation *1  
During operation at 1MHz *1  
Without panel load  
OSCC="0"  
Without panel load  
60  
65  
200  
110  
120  
330  
µA  
µA  
µA  
1: The SVD circuit is in the ON status (HLMOD="1", BLS="0"). The analog comparator is in the OFF status.  
Oscillation Characteristics  
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the follow-  
ing characteristics as reference values.  
E0C6S32 (Crystal oscillation circuit)  
(Unless otherwise specified: VDD=0V, VSS=-3.0V, Crystal: C-002R (C  
I
=35k), C  
G
=25pF, CD=built-in, Ta=25°C)  
Characteristic  
Oscillation start voltage  
Oscillation stop voltage  
Built-in capacitance (drain)  
Frequency/voltage deviation  
Frequency/IC deviation  
Frequency adjustment range  
Harmonic oscillation start voltage  
Permitted leak resistance  
Symbol  
Vsta  
Vstp  
Condition  
Min.  
-1.8  
-1.8  
Typ.  
Max.  
Unit  
V
V
t
t
sta5sec  
stp10sec  
(VSS  
(VSS  
)
)
C
D
Including the parasitic capacity inside the IC  
20  
45  
pF  
f/V  
f/IC  
V
SS=-1.8 to -3.6V  
=5 to 25pF  
Between OSC1 and VDD, VSS  
5
10  
ppm  
ppm  
ppm  
V
-10  
35  
f/CG  
CG  
V
hho  
(VSS  
)
-3.6  
Rleak  
200  
MΩ  
8