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E0C63158F 参数 Datasheet PDF下载

E0C63158F图片预览
型号: E0C63158F
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 4.1MHz, MICROCONTROLLER, PQFP64, PLASTIC, QFP13-64]
分类和应用: 时钟外围集成电路
文件页数/大小: 10 页 / 90 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C63158  
No. Pin name No. Pin name No. Pin name No. Pin name  
QFP13-64pin  
1
2
3
4
5
6
7
8
9
V
SS  
17 P43  
18 P42  
19 P41  
20 P40  
21 P33  
22 P32  
23 P31  
24 P30  
25 P23  
26 P22  
27 P21  
28 P20  
29 P13  
30 P12  
31 P11  
32 P10  
33 P03  
34 P02  
35 P01  
36 P00  
37 R23  
38 R22  
39 R21  
40 R20  
41 R13  
42 R12  
43 R11  
44 R10  
45 R03  
46 R02  
47 N.C.  
48 N.C.  
49 N.C.  
50 N.C.  
51 N.C.  
52 R01  
53 R00  
54 BZ  
55 K00  
56 K01  
57 K02  
58 K03  
59 K10  
60 K11  
61 K12  
62 K13  
63 K20  
64 N.C.  
48  
33  
OSC1  
OSC2  
VD1  
49  
32  
OSC3  
OSC4  
VDD  
E0C63158  
RESET  
TEST  
10 AVDD  
11 AVSS  
12 AVREF  
13 CB  
INDEX  
64  
17  
1
16  
14 CA  
15 VC2  
16 N.C.  
N.C. : No Connection  
PIN DESCRIPTION  
Pin No.  
Pin name  
In/Out  
Function  
QFP12-48 QFP13-64  
VDD  
VSS  
VD1  
VC2  
7
7
1
Power (+) supply pin  
Power (–) supply pin  
1
4
4
Oscillation/internal logic system regulated voltage output pin  
13  
15  
Booster power supply pin  
CA, CB  
OSC1  
12, 11  
14, 13  
2
Boosting capacitor connecting pin  
2
I
Crystal or CR oscillation input pin (selected by mask option)  
OSC2  
3
5
3
O
I
Crystal or CR oscillation output pin (selected by mask option)  
OSC3  
5
CR or ceramic oscillation input pin (selected by mask option)  
OSC4  
6
6
O
I
CR or ceramic oscillation output pin (selected by mask option)  
K00–K03  
K10–K13  
K20  
40–43  
44–47  
48  
55–58  
59–62  
63  
Input port  
I
Input port  
I
Input port (key-position detect interrupt port)  
P00–P03  
P10–P13  
P20–P23  
P30–P33  
P40–P43  
R00  
29–26  
25–22  
21–18  
36–33  
32–29  
28–25  
24–21  
20–17  
53  
I/O  
I/O  
I/O  
I/O  
I/O  
O
O
O
O
O
O
I/O port  
I/O port (switching to serial I/F input/output is possible by software)  
I/O port  
1
I/O port  
17–14  
38  
I/O port (can be used as A/D converter inputs)  
Output port  
R01  
37  
52  
Output port  
R02  
35  
46  
Output port (switching to TOUT output is possible by software)  
Output port (switching to FOUT output is possible by software)  
Output port  
R03  
34  
45  
R10–R13  
R20–R23  
AVDD  
33–30  
44–41  
40–37  
10  
1
2
2
Output port  
Power (+) supply pin for A/D converter  
Power (–) supply pin for A/D converter  
Reference voltage for A/D converter  
Buzzer output pin  
AVSS  
11  
AVREF  
BZ  
10  
12  
39  
54  
O
I
RESET  
TEST  
8
8
Initial reset input pin  
9
9
I
Testing input pin  
1: P30–P33 and R20–R23 are not available in the QFP12-48pin package.  
2: In the QFP12-48pin package, AVDD and AVSS are connected with VDD and VSS inside of the IC, respectively.  
3