SS2412
CMOS High Sensitivity Micropower Hall Latch
Output Behavior versus Magnetic Pole
DC Operating Parameters TA = -40°C to 150°C, VDD = 2.5 to 5.5V (unless otherwise specified)
Test Conditions (UA) Test Conditions (SO)
OUT
High
Low
B < BRP
B > BOP
B > BRP
B < BOP
The SOT-23 device is reversed from the UA package. The SOT-23 output transistor will be turned on(drops low) in the presence of a
sufficiently strong North pole magnetic field applied to the marked face and turned off(hoists high) in the presence of a sufficiently
strong South pole magnetic field.
Unique Features
CMOS Hall IC Technology
The chopper stabilized amplifier uses switched capacitor techniques to eliminate the amplifier offset voltage,
which, in bipolar devices, is a major source of temperature sensitive drift. CMOS makes this advanced technique
possible. The CMOS chip is also much smaller than a bipolar chip, allowing very sophisticated circuitry to be
placed in less space. The small chip size also contributes to lower physical stress and less power consumption.
ESD Protection
Human Body Model (HBM) tests according to: Mil. Std. 883F method 3015.7
Limit Values
Parameter
Symbol
Unit
Notes
Min
Max
ESD Voltage
VESD
kV
±4
ESD Precautions
Electronic semiconductor products are sensitive to Electro Static Discharge (ESD). Always observe Electro Static
Discharge control procedures whenever handling semiconductor products.
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V3.10 Nov 1, 2013
SECELECTRONICS [ SEC Electronics Inc. ]
